From 527cabaf297b5c843003449511d06419ded0d2e4 Mon Sep 17 00:00:00 2001 From: Ian Lance Taylor Date: Fri, 21 Mar 1997 00:53:24 +0000 Subject: [PATCH] * i386.h: Change DW to W for cmpxchg and xadd, since they don't take a direction bit. --- include/opcode/ChangeLog | 11 ++++++ include/opcode/i386.h | 93 ++++++++++++++++++++++++++++++++++-------------- 2 files changed, 77 insertions(+), 27 deletions(-) diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 27b1725..8790981 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,14 @@ +Thu Mar 20 19:49:10 1997 Ian Lance Taylor + + * i386.h: Change DW to W for cmpxchg and xadd, since they don't + take a direction bit. + +start-sanitize-coldfire +Wed Mar 19 06:24:58 1997 J.T. Conklin + + * m68k.h (mcfmac, mcfdiv): New macros. + +end-sanitize-coldfire Sat Mar 15 19:03:29 1997 H.J. Lu * sparc.h (sparc_opcode_lookup_arch): Use full prototype. diff --git a/include/opcode/i386.h b/include/opcode/i386.h index 7a39564..fddecfc 100644 --- a/include/opcode/i386.h +++ b/include/opcode/i386.h @@ -1,5 +1,5 @@ /* i386-opcode.h -- Intel 80386 opcode table - Copyright 1989, 1991, 1992 Free Software Foundation. + Copyright 1989, 91, 92, 93, 94, 95, 1996 Free Software Foundation. This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger. @@ -99,12 +99,12 @@ static const template i386_optab[] = { {"cmc", 0, 0xf5, _, NoModrm, { 0, 0, 0} }, {"lahf", 0, 0x9f, _, NoModrm, { 0, 0, 0} }, {"sahf", 0, 0x9e, _, NoModrm, { 0, 0, 0} }, -{"pushf", 0, 0x9c, _, NoModrm|Data32, { 0, 0, 0} }, -{"popf", 0, 0x9d, _, NoModrm|Data32, { 0, 0, 0} }, {"pushfl", 0, 0x9c, _, NoModrm|Data32, { 0, 0, 0} }, {"popfl", 0, 0x9d, _, NoModrm|Data32, { 0, 0, 0} }, {"pushfw", 0, 0x9c, _, NoModrm|Data16, { 0, 0, 0} }, {"popfw", 0, 0x9d, _, NoModrm|Data16, { 0, 0, 0} }, +{"pushf", 0, 0x9c, _, NoModrm, { 0, 0, 0} }, +{"popf", 0, 0x9d, _, NoModrm, { 0, 0, 0} }, {"stc", 0, 0xf9, _, NoModrm, { 0, 0, 0} }, {"std", 0, 0xfd, _, NoModrm, { 0, 0, 0} }, {"sti", 0, 0xfb, _, NoModrm, { 0, 0, 0} }, @@ -263,7 +263,7 @@ static const template i386_optab[] = { {"call", 1, 0xff, 2, Modrm|Data32, { Reg|Mem|JumpAbsolute, 0, 0} }, {"callw", 1, 0xff, 2, Modrm|Data16, { Reg|Mem|JumpAbsolute, 0, 0} }, #define CALL_FAR_IMMEDIATE 0x9a -{"lcall", 2, 0x9a, _, JumpInterSegment, { Imm16, Abs32|Imm32, 0} }, +{"lcall", 2, 0x9a, _, JumpInterSegment, { Imm16, Imm32, 0} }, {"lcall", 1, 0xff, 3, Modrm|Data32, { Mem, 0, 0} }, {"lcallw", 1, 0xff, 3, Modrm|Data16, { Mem, 0, 0} }, @@ -556,8 +556,9 @@ static const template i386_optab[] = { {"fadd", 1, 0xd8c0, _, ShortForm, { FloatReg, 0, 0} }, {"fadd", 2, 0xd8c0, _, ShortForm|FloatD, { FloatReg, FloatAcc, 0} }, {"fadd", 0, 0xdcc1, _, NoModrm, { 0, 0, 0} }, /* alias for fadd %st, %st(1) */ -{"faddp", 1, 0xdac0, _, ShortForm, { FloatReg, 0, 0} }, -{"faddp", 2, 0xdac0, _, ShortForm|FloatD, { FloatReg, FloatAcc, 0} }, +{"faddp", 1, 0xdec0, _, ShortForm, { FloatReg, 0, 0} }, +{"faddp", 2, 0xdec0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"faddp", 2, 0xdec0, _, ShortForm, { FloatAcc, FloatReg, 0} }, {"faddp", 0, 0xdec1, _, NoModrm, { 0, 0, 0} }, /* alias for faddp %st, %st(1) */ {"fadds", 1, 0xd8, 0, Modrm, { Mem, 0, 0} }, {"fiaddl", 1, 0xda, 0, Modrm, { Mem, 0, 0} }, @@ -575,8 +576,8 @@ static const template i386_optab[] = { {"fsub", 2, 0xdce0, _, ShortForm, { FloatAcc, FloatReg, 0} }, #endif {"fsub", 0, 0xdce1, _, NoModrm, { 0, 0, 0} }, -{"fsubp", 1, 0xdae0, _, ShortForm, { FloatReg, 0, 0} }, -{"fsubp", 2, 0xdae0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fsubp", 1, 0xdee0, _, ShortForm, { FloatReg, 0, 0} }, +{"fsubp", 2, 0xdee0, _, ShortForm, { FloatReg, FloatAcc, 0} }, #ifdef NON_BROKEN_OPCODES {"fsubp", 2, 0xdee8, _, ShortForm, { FloatAcc, FloatReg, 0} }, #else @@ -597,8 +598,8 @@ static const template i386_optab[] = { {"fsubr", 2, 0xdce8, _, ShortForm, { FloatAcc, FloatReg, 0} }, #endif {"fsubr", 0, 0xdce9, _, NoModrm, { 0, 0, 0} }, -{"fsubrp", 1, 0xdae8, _, ShortForm, { FloatReg, 0, 0} }, -{"fsubrp", 2, 0xdae8, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fsubrp", 1, 0xdee8, _, ShortForm, { FloatReg, 0, 0} }, +{"fsubrp", 2, 0xdee8, _, ShortForm, { FloatReg, FloatAcc, 0} }, #ifdef NON_BROKEN_OPCODES {"fsubrp", 2, 0xdee0, _, ShortForm, { FloatAcc, FloatReg, 0} }, #else @@ -614,8 +615,9 @@ static const template i386_optab[] = { {"fmul", 1, 0xd8c8, _, ShortForm, { FloatReg, 0, 0} }, {"fmul", 2, 0xd8c8, _, ShortForm|FloatD, { FloatReg, FloatAcc, 0} }, {"fmul", 0, 0xdcc9, _, NoModrm, { 0, 0, 0} }, -{"fmulp", 1, 0xdac8, _, ShortForm, { FloatReg, 0, 0} }, -{"fmulp", 2, 0xdac8, _, ShortForm|FloatD, { FloatReg, FloatAcc, 0} }, +{"fmulp", 1, 0xdec8, _, ShortForm, { FloatReg, 0, 0} }, +{"fmulp", 2, 0xdec8, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fmulp", 2, 0xdec8, _, ShortForm, { FloatAcc, FloatReg, 0} }, {"fmulp", 0, 0xdec9, _, NoModrm, { 0, 0, 0} }, {"fmuls", 1, 0xd8, 1, Modrm, { Mem, 0, 0} }, {"fimull", 1, 0xda, 1, Modrm, { Mem, 0, 0} }, @@ -633,8 +635,8 @@ static const template i386_optab[] = { {"fdiv", 2, 0xdcf0, _, ShortForm, { FloatAcc, FloatReg, 0} }, #endif {"fdiv", 0, 0xdcf1, _, NoModrm, { 0, 0, 0} }, -{"fdivp", 1, 0xdaf0, _, ShortForm, { FloatReg, 0, 0} }, -{"fdivp", 2, 0xdaf0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fdivp", 1, 0xdef0, _, ShortForm, { FloatReg, 0, 0} }, +{"fdivp", 2, 0xdef0, _, ShortForm, { FloatReg, FloatAcc, 0} }, #ifdef NON_BROKEN_OPCODES {"fdivp", 2, 0xdef8, _, ShortForm, { FloatAcc, FloatReg, 0} }, #else @@ -655,8 +657,8 @@ static const template i386_optab[] = { {"fdivr", 2, 0xdcf8, _, ShortForm, { FloatAcc, FloatReg, 0} }, #endif {"fdivr", 0, 0xdcf9, _, NoModrm, { 0, 0, 0} }, -{"fdivrp", 1, 0xdaf8, _, ShortForm, { FloatReg, 0, 0} }, -{"fdivrp", 2, 0xdaf8, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fdivrp", 1, 0xdef8, _, ShortForm, { FloatReg, 0, 0} }, +{"fdivrp", 2, 0xdef8, _, ShortForm, { FloatReg, FloatAcc, 0} }, #ifdef NON_BROKEN_OPCODES {"fdivrp", 2, 0xdef0, _, ShortForm, { FloatAcc, FloatReg, 0} }, #else @@ -690,31 +692,33 @@ static const template i386_optab[] = { /* processor control */ {"fninit", 0, 0xdbe3, _, NoModrm, { 0, 0, 0} }, -{"finit", 0, 0xdbe3, _, NoModrm, { 0, 0, 0} }, +{"finit", 0, 0x9bdbe3, _, NoModrm, { 0, 0, 0} }, {"fldcw", 1, 0xd9, 5, Modrm, { Mem, 0, 0} }, {"fnstcw", 1, 0xd9, 7, Modrm, { Mem, 0, 0} }, -{"fstcw", 1, 0xd9, 7, Modrm, { Mem, 0, 0} }, +{"fstcw", 1, 0x9bd9, 7, Modrm, { Mem, 0, 0} }, {"fnstsw", 1, 0xdfe0, _, NoModrm, { Acc, 0, 0} }, {"fnstsw", 1, 0xdd, 7, Modrm, { Mem, 0, 0} }, {"fnstsw", 0, 0xdfe0, _, NoModrm, { 0, 0, 0} }, -{"fstsw", 1, 0xdfe0, _, NoModrm, { Acc, 0, 0} }, -{"fstsw", 1, 0xdd, 7, Modrm, { Mem, 0, 0} }, -{"fstsw", 0, 0xdfe0, _, NoModrm, { 0, 0, 0} }, +{"fstsw", 1, 0x9bdfe0, _, NoModrm, { Acc, 0, 0} }, +{"fstsw", 1, 0x9bdd, 7, Modrm, { Mem, 0, 0} }, +{"fstsw", 0, 0x9bdfe0, _, NoModrm, { 0, 0, 0} }, {"fnclex", 0, 0xdbe2, _, NoModrm, { 0, 0, 0} }, -{"fclex", 0, 0xdbe2, _, NoModrm, { 0, 0, 0} }, +{"fclex", 0, 0x9bdbe2, _, NoModrm, { 0, 0, 0} }, /* We ignore the short format (287) versions of fstenv/fldenv & fsave/frstor instructions; i'm not sure how to add them or how they are different. My 386/387 book offers no details about this. */ {"fnstenv", 1, 0xd9, 6, Modrm, { Mem, 0, 0} }, -{"fstenv", 1, 0xd9, 6, Modrm, { Mem, 0, 0} }, +{"fstenv", 1, 0x9bd9, 6, Modrm, { Mem, 0, 0} }, {"fldenv", 1, 0xd9, 4, Modrm, { Mem, 0, 0} }, {"fnsave", 1, 0xdd, 6, Modrm, { Mem, 0, 0} }, -{"fsave", 1, 0xdd, 6, Modrm, { Mem, 0, 0} }, +{"fsave", 1, 0x9bdd, 6, Modrm, { Mem, 0, 0} }, {"frstor", 1, 0xdd, 4, Modrm, { Mem, 0, 0} }, {"ffree", 1, 0xddc0, _, ShortForm, { FloatReg, 0, 0} }, +/* P6:free st(i), pop st */ +{"ffreep", 1, 0xdfc0, _, ShortForm, { FloatReg, 0, 0} }, {"fnop", 0, 0xd9d0, _, NoModrm, { 0, 0, 0} }, {"fwait", 0, 0x9b, _, NoModrm, { 0, 0, 0} }, @@ -742,8 +746,8 @@ static const template i386_optab[] = { /* 486 extensions */ {"bswap", 1, 0x0fc8, _, ShortForm, { Reg32,0,0 } }, -{"xadd", 2, 0x0fc0, _, DW|Modrm, { Reg, Reg|Mem, 0 } }, -{"cmpxchg", 2, 0x0fb0, _, DW|Modrm, { Reg, Reg|Mem, 0 } }, +{"xadd", 2, 0x0fc0, _, W|Modrm, { Reg, Reg|Mem, 0 } }, +{"cmpxchg", 2, 0x0fb0, _, W|Modrm, { Reg, Reg|Mem, 0 } }, {"invd", 0, 0x0f08, _, NoModrm, { 0, 0, 0} }, {"wbinvd", 0, 0x0f09, _, NoModrm, { 0, 0, 0} }, {"invlpg", 1, 0x0f01, 7, Modrm, { Mem, 0, 0} }, @@ -755,7 +759,41 @@ static const template i386_optab[] = { {"wrmsr", 0, 0x0f30, _, NoModrm, { 0, 0, 0} }, {"rdtsc", 0, 0x0f31, _, NoModrm, { 0, 0, 0} }, {"rdmsr", 0, 0x0f32, _, NoModrm, { 0, 0, 0} }, -{"cmpxchg8b", 1, 0x0fc7, _, Modrm, { Mem, 0, 0} }, +{"cmpxchg8b", 1, 0x0fc7, 1, Modrm, { Mem, 0, 0} }, + +/* Pentium Pro extensions */ +{"rdpmc", 0, 0x0f33, _, NoModrm, { 0, 0, 0} }, + +{"cmovo", 2, 0x0f40, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovno", 2, 0x0f41, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovb", 2, 0x0f42, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovae", 2, 0x0f43, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmove", 2, 0x0f44, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovne", 2, 0x0f45, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovbe", 2, 0x0f46, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmova", 2, 0x0f47, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovs", 2, 0x0f48, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovns", 2, 0x0f49, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovp", 2, 0x0f4a, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovnp", 2, 0x0f4b, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovl", 2, 0x0f4c, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovge", 2, 0x0f4d, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovle", 2, 0x0f4e, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, +{"cmovg", 2, 0x0f4f, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} }, + +{"fcmovb", 2, 0xdac0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmove", 2, 0xdac8, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovbe",2, 0xdad0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovu", 2, 0xdad8, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovnb", 2, 0xdbc0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovne", 2, 0xdbc8, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovnbe",2, 0xdbd0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcmovnu", 2, 0xdbd8, _, ShortForm, { FloatReg, FloatAcc, 0} }, + +{"fcomi", 2, 0xdbf0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fucomi", 2, 0xdbe8, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fcomip", 2, 0xdff0, _, ShortForm, { FloatReg, FloatAcc, 0} }, +{"fucomip",2, 0xdfe8, _, ShortForm, { FloatReg, FloatAcc, 0} }, {"", 0, 0, 0, 0, { 0, 0, 0} } /* sentinel */ }; @@ -789,6 +827,7 @@ static const reg_entry i386_regtab[] = { {"dr0", Debug, 0}, {"dr1", Debug, 1}, {"dr2", Debug, 2}, {"dr3", Debug, 3}, {"dr6", Debug, 6}, {"dr7", Debug, 7}, /* test registers */ + {"tr3", Test, 3}, {"tr4", Test, 4}, {"tr5", Test, 5}, {"tr6", Test, 6}, {"tr7", Test, 7}, /* float registers */ {"st(0)", FloatReg|FloatAcc, 0}, -- 2.7.4