From 524d8fa9a5a5428628a21a91016a52a54a9fe838 Mon Sep 17 00:00:00 2001 From: Roger Ferrer Ibanez Date: Sat, 9 Jan 2021 16:49:05 +0000 Subject: [PATCH] [RISCV] Do not grow the stack a second time when we need to realign the stack This is a first change needed to fix a crash in which the emergency spill splot ends being out of reach. This happens when we run the register scavenger after we have eliminated the frame indexes. The fix for the actual crash will come in a later change. This change removes an extra stack size increase we do in RISCVFrameLowering::determineFrameLayout. We don't have to change the size of the stack here as PEI::calculateFrameObjectOffsets is already doing this with the right size accounting the extra alignment. Differential Revision: https://reviews.llvm.org/D89237 --- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 6 - ...tack-realignment-with-variable-sized-objects.ll | 48 ++--- llvm/test/CodeGen/RISCV/stack-realignment.ll | 238 ++++++++++----------- 3 files changed, 138 insertions(+), 154 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp index 26ff6dd..564d97f 100644 --- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp @@ -235,18 +235,12 @@ bool RISCVFrameLowering::hasBP(const MachineFunction &MF) const { // Determines the size of the frame and maximum call frame size. void RISCVFrameLowering::determineFrameLayout(MachineFunction &MF) const { MachineFrameInfo &MFI = MF.getFrameInfo(); - const RISCVRegisterInfo *RI = STI.getRegisterInfo(); // Get the number of bytes to allocate from the FrameInfo. uint64_t FrameSize = MFI.getStackSize(); // Get the alignment. Align StackAlign = getStackAlign(); - if (RI->needsStackRealignment(MF)) { - Align MaxStackAlign = std::max(StackAlign, MFI.getMaxAlign()); - FrameSize += (MaxStackAlign.value() - StackAlign.value()); - StackAlign = MaxStackAlign; - } // Set Max Call Frame Size uint64_t MaxCallSize = alignTo(MFI.getMaxCallFrameSize(), StackAlign); diff --git a/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll b/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll index edfa4b4..7f7e1c4 100644 --- a/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll +++ b/llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll @@ -9,15 +9,15 @@ declare void @callee(i8*, i32*) define void @caller(i32 %n) { ; RV32I-LABEL: caller: ; RV32I: # %bb.0: -; RV32I-NEXT: addi sp, sp, -128 -; RV32I-NEXT: .cfi_def_cfa_offset 128 -; RV32I-NEXT: sw ra, 124(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 120(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s1, 116(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi sp, sp, -64 +; RV32I-NEXT: .cfi_def_cfa_offset 64 +; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s1, 52(sp) # 4-byte Folded Spill ; RV32I-NEXT: .cfi_offset ra, -4 ; RV32I-NEXT: .cfi_offset s0, -8 ; RV32I-NEXT: .cfi_offset s1, -12 -; RV32I-NEXT: addi s0, sp, 128 +; RV32I-NEXT: addi s0, sp, 64 ; RV32I-NEXT: .cfi_def_cfa s0, 0 ; RV32I-NEXT: andi sp, sp, -64 ; RV32I-NEXT: mv s1, sp @@ -25,26 +25,26 @@ define void @caller(i32 %n) { ; RV32I-NEXT: andi a0, a0, -16 ; RV32I-NEXT: sub a0, sp, a0 ; RV32I-NEXT: mv sp, a0 -; RV32I-NEXT: addi a1, s1, 64 +; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: addi sp, s0, -128 -; RV32I-NEXT: lw s1, 116(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s0, 120(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw ra, 124(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 128 +; RV32I-NEXT: addi sp, s0, -64 +; RV32I-NEXT: lw s1, 52(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 64 ; RV32I-NEXT: ret ; ; RV64I-LABEL: caller: ; RV64I: # %bb.0: -; RV64I-NEXT: addi sp, sp, -128 -; RV64I-NEXT: .cfi_def_cfa_offset 128 -; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s1, 104(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi sp, sp, -64 +; RV64I-NEXT: .cfi_def_cfa_offset 64 +; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s1, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s1, -24 -; RV64I-NEXT: addi s0, sp, 128 +; RV64I-NEXT: addi s0, sp, 64 ; RV64I-NEXT: .cfi_def_cfa s0, 0 ; RV64I-NEXT: andi sp, sp, -64 ; RV64I-NEXT: mv s1, sp @@ -57,13 +57,13 @@ define void @caller(i32 %n) { ; RV64I-NEXT: and a0, a0, a1 ; RV64I-NEXT: sub a0, sp, a0 ; RV64I-NEXT: mv sp, a0 -; RV64I-NEXT: addi a1, s1, 64 +; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: addi sp, s0, -128 -; RV64I-NEXT: ld s1, 104(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 128 +; RV64I-NEXT: addi sp, s0, -64 +; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 64 ; RV64I-NEXT: ret %1 = alloca i8, i32 %n %2 = alloca i32, align 64 diff --git a/llvm/test/CodeGen/RISCV/stack-realignment.ll b/llvm/test/CodeGen/RISCV/stack-realignment.ll index f37549e..fb7e668 100644 --- a/llvm/test/CodeGen/RISCV/stack-realignment.ll +++ b/llvm/test/CodeGen/RISCV/stack-realignment.ll @@ -9,32 +9,32 @@ declare void @callee(i8*) define void @caller32() nounwind { ; RV32I-LABEL: caller32: ; RV32I: # %bb.0: -; RV32I-NEXT: addi sp, sp, -64 -; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill -; RV32I-NEXT: addi s0, sp, 64 +; RV32I-NEXT: addi sp, sp, -32 +; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi s0, sp, 32 ; RV32I-NEXT: andi sp, sp, -32 -; RV32I-NEXT: addi a0, sp, 32 +; RV32I-NEXT: mv a0, sp ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: addi sp, s0, -64 -; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 64 +; RV32I-NEXT: addi sp, s0, -32 +; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; ; RV64I-LABEL: caller32: ; RV64I: # %bb.0: -; RV64I-NEXT: addi sp, sp, -64 -; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill -; RV64I-NEXT: addi s0, sp, 64 +; RV64I-NEXT: addi sp, sp, -32 +; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi s0, sp, 32 ; RV64I-NEXT: andi sp, sp, -32 -; RV64I-NEXT: addi a0, sp, 32 +; RV64I-NEXT: mv a0, sp ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: addi sp, s0, -64 -; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 64 +; RV64I-NEXT: addi sp, s0, -32 +; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: ret %1 = alloca i8, align 32 call void @callee(i8* %1) @@ -69,32 +69,32 @@ define void @caller_no_realign32() nounwind "no-realign-stack" { define void @caller64() nounwind { ; RV32I-LABEL: caller64: ; RV32I: # %bb.0: -; RV32I-NEXT: addi sp, sp, -128 -; RV32I-NEXT: sw ra, 124(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 120(sp) # 4-byte Folded Spill -; RV32I-NEXT: addi s0, sp, 128 +; RV32I-NEXT: addi sp, sp, -64 +; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi s0, sp, 64 ; RV32I-NEXT: andi sp, sp, -64 -; RV32I-NEXT: addi a0, sp, 64 +; RV32I-NEXT: mv a0, sp ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: addi sp, s0, -128 -; RV32I-NEXT: lw s0, 120(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw ra, 124(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 128 +; RV32I-NEXT: addi sp, s0, -64 +; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 64 ; RV32I-NEXT: ret ; ; RV64I-LABEL: caller64: ; RV64I: # %bb.0: -; RV64I-NEXT: addi sp, sp, -128 -; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill -; RV64I-NEXT: addi s0, sp, 128 +; RV64I-NEXT: addi sp, sp, -64 +; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi s0, sp, 64 ; RV64I-NEXT: andi sp, sp, -64 -; RV64I-NEXT: addi a0, sp, 64 +; RV64I-NEXT: mv a0, sp ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: addi sp, s0, -128 -; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 128 +; RV64I-NEXT: addi sp, s0, -64 +; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 64 ; RV64I-NEXT: ret %1 = alloca i8, align 64 call void @callee(i8* %1) @@ -129,32 +129,32 @@ define void @caller_no_realign64() nounwind "no-realign-stack" { define void @caller128() nounwind { ; RV32I-LABEL: caller128: ; RV32I: # %bb.0: -; RV32I-NEXT: addi sp, sp, -256 -; RV32I-NEXT: sw ra, 252(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 248(sp) # 4-byte Folded Spill -; RV32I-NEXT: addi s0, sp, 256 +; RV32I-NEXT: addi sp, sp, -128 +; RV32I-NEXT: sw ra, 124(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 120(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi s0, sp, 128 ; RV32I-NEXT: andi sp, sp, -128 -; RV32I-NEXT: addi a0, sp, 128 +; RV32I-NEXT: mv a0, sp ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: addi sp, s0, -256 -; RV32I-NEXT: lw s0, 248(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw ra, 252(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 256 +; RV32I-NEXT: addi sp, s0, -128 +; RV32I-NEXT: lw s0, 120(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw ra, 124(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 128 ; RV32I-NEXT: ret ; ; RV64I-LABEL: caller128: ; RV64I: # %bb.0: -; RV64I-NEXT: addi sp, sp, -256 -; RV64I-NEXT: sd ra, 248(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 240(sp) # 8-byte Folded Spill -; RV64I-NEXT: addi s0, sp, 256 +; RV64I-NEXT: addi sp, sp, -128 +; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi s0, sp, 128 ; RV64I-NEXT: andi sp, sp, -128 -; RV64I-NEXT: addi a0, sp, 128 +; RV64I-NEXT: mv a0, sp ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: addi sp, s0, -256 -; RV64I-NEXT: ld s0, 240(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld ra, 248(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 256 +; RV64I-NEXT: addi sp, s0, -128 +; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 128 ; RV64I-NEXT: ret %1 = alloca i8, align 128 call void @callee(i8* %1) @@ -189,32 +189,32 @@ define void @caller_no_realign128() nounwind "no-realign-stack" { define void @caller256() nounwind { ; RV32I-LABEL: caller256: ; RV32I: # %bb.0: -; RV32I-NEXT: addi sp, sp, -512 -; RV32I-NEXT: sw ra, 508(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 504(sp) # 4-byte Folded Spill -; RV32I-NEXT: addi s0, sp, 512 +; RV32I-NEXT: addi sp, sp, -256 +; RV32I-NEXT: sw ra, 252(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 248(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi s0, sp, 256 ; RV32I-NEXT: andi sp, sp, -256 -; RV32I-NEXT: addi a0, sp, 256 +; RV32I-NEXT: mv a0, sp ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: addi sp, s0, -512 -; RV32I-NEXT: lw s0, 504(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw ra, 508(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 512 +; RV32I-NEXT: addi sp, s0, -256 +; RV32I-NEXT: lw s0, 248(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw ra, 252(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 256 ; RV32I-NEXT: ret ; ; RV64I-LABEL: caller256: ; RV64I: # %bb.0: -; RV64I-NEXT: addi sp, sp, -512 -; RV64I-NEXT: sd ra, 504(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 496(sp) # 8-byte Folded Spill -; RV64I-NEXT: addi s0, sp, 512 +; RV64I-NEXT: addi sp, sp, -256 +; RV64I-NEXT: sd ra, 248(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 240(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi s0, sp, 256 ; RV64I-NEXT: andi sp, sp, -256 -; RV64I-NEXT: addi a0, sp, 256 +; RV64I-NEXT: mv a0, sp ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: addi sp, s0, -512 -; RV64I-NEXT: ld s0, 496(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld ra, 504(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 512 +; RV64I-NEXT: addi sp, s0, -256 +; RV64I-NEXT: ld s0, 240(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld ra, 248(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 256 ; RV64I-NEXT: ret %1 = alloca i8, align 256 call void @callee(i8* %1) @@ -249,32 +249,32 @@ define void @caller_no_realign256() nounwind "no-realign-stack" { define void @caller512() nounwind { ; RV32I-LABEL: caller512: ; RV32I: # %bb.0: -; RV32I-NEXT: addi sp, sp, -1536 -; RV32I-NEXT: sw ra, 1532(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 1528(sp) # 4-byte Folded Spill -; RV32I-NEXT: addi s0, sp, 1536 +; RV32I-NEXT: addi sp, sp, -1024 +; RV32I-NEXT: sw ra, 1020(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 1016(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi s0, sp, 1024 ; RV32I-NEXT: andi sp, sp, -512 -; RV32I-NEXT: addi a0, sp, 1024 +; RV32I-NEXT: addi a0, sp, 512 ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: addi sp, s0, -1536 -; RV32I-NEXT: lw s0, 1528(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw ra, 1532(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 1536 +; RV32I-NEXT: addi sp, s0, -1024 +; RV32I-NEXT: lw s0, 1016(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw ra, 1020(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 1024 ; RV32I-NEXT: ret ; ; RV64I-LABEL: caller512: ; RV64I: # %bb.0: -; RV64I-NEXT: addi sp, sp, -1536 -; RV64I-NEXT: sd ra, 1528(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 1520(sp) # 8-byte Folded Spill -; RV64I-NEXT: addi s0, sp, 1536 +; RV64I-NEXT: addi sp, sp, -1024 +; RV64I-NEXT: sd ra, 1016(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 1008(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi s0, sp, 1024 ; RV64I-NEXT: andi sp, sp, -512 -; RV64I-NEXT: addi a0, sp, 1024 +; RV64I-NEXT: addi a0, sp, 512 ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: addi sp, s0, -1536 -; RV64I-NEXT: ld s0, 1520(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld ra, 1528(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 1536 +; RV64I-NEXT: addi sp, s0, -1024 +; RV64I-NEXT: ld s0, 1008(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld ra, 1016(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 1024 ; RV64I-NEXT: ret %1 = alloca i8, align 512 call void @callee(i8* %1) @@ -313,17 +313,12 @@ define void @caller1024() nounwind { ; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill ; RV32I-NEXT: addi s0, sp, 2032 -; RV32I-NEXT: addi sp, sp, -1040 +; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: andi sp, sp, -1024 -; RV32I-NEXT: lui a0, 1 -; RV32I-NEXT: addi a0, a0, -2048 -; RV32I-NEXT: add a0, sp, a0 -; RV32I-NEXT: mv a0, a0 +; RV32I-NEXT: addi a0, sp, 1024 ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: lui a0, 1 -; RV32I-NEXT: addi a0, a0, -1024 -; RV32I-NEXT: sub sp, s0, a0 -; RV32I-NEXT: addi sp, sp, 1040 +; RV32I-NEXT: addi sp, s0, -2048 +; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 2032 @@ -335,17 +330,12 @@ define void @caller1024() nounwind { ; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill ; RV64I-NEXT: addi s0, sp, 2032 -; RV64I-NEXT: addi sp, sp, -1040 +; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: andi sp, sp, -1024 -; RV64I-NEXT: lui a0, 1 -; RV64I-NEXT: addiw a0, a0, -2048 -; RV64I-NEXT: add a0, sp, a0 -; RV64I-NEXT: mv a0, a0 +; RV64I-NEXT: addi a0, sp, 1024 ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: lui a0, 1 -; RV64I-NEXT: addiw a0, a0, -1024 -; RV64I-NEXT: sub sp, s0, a0 -; RV64I-NEXT: addi sp, sp, 1040 +; RV64I-NEXT: addi sp, s0, -2048 +; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 2032 @@ -388,18 +378,18 @@ define void @caller2048() nounwind { ; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill ; RV32I-NEXT: addi s0, sp, 2032 ; RV32I-NEXT: lui a0, 1 -; RV32I-NEXT: addi a0, a0, 16 +; RV32I-NEXT: addi a0, a0, -2032 ; RV32I-NEXT: sub sp, sp, a0 ; RV32I-NEXT: andi sp, sp, -2048 ; RV32I-NEXT: lui a0, 1 +; RV32I-NEXT: addi a0, a0, -2048 ; RV32I-NEXT: add a0, sp, a0 ; RV32I-NEXT: mv a0, a0 ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: lui a0, 2 -; RV32I-NEXT: addi a0, a0, -2048 +; RV32I-NEXT: lui a0, 1 ; RV32I-NEXT: sub sp, s0, a0 ; RV32I-NEXT: lui a0, 1 -; RV32I-NEXT: addi a0, a0, 16 +; RV32I-NEXT: addi a0, a0, -2032 ; RV32I-NEXT: add sp, sp, a0 ; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload @@ -413,18 +403,18 @@ define void @caller2048() nounwind { ; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill ; RV64I-NEXT: addi s0, sp, 2032 ; RV64I-NEXT: lui a0, 1 -; RV64I-NEXT: addiw a0, a0, 16 +; RV64I-NEXT: addiw a0, a0, -2032 ; RV64I-NEXT: sub sp, sp, a0 ; RV64I-NEXT: andi sp, sp, -2048 ; RV64I-NEXT: lui a0, 1 +; RV64I-NEXT: addiw a0, a0, -2048 ; RV64I-NEXT: add a0, sp, a0 ; RV64I-NEXT: mv a0, a0 ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: lui a0, 2 -; RV64I-NEXT: addiw a0, a0, -2048 +; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: sub sp, s0, a0 ; RV64I-NEXT: lui a0, 1 -; RV64I-NEXT: addiw a0, a0, 16 +; RV64I-NEXT: addiw a0, a0, -2032 ; RV64I-NEXT: add sp, sp, a0 ; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload @@ -467,18 +457,18 @@ define void @caller4096() nounwind { ; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill ; RV32I-NEXT: addi s0, sp, 2032 -; RV32I-NEXT: lui a0, 3 +; RV32I-NEXT: lui a0, 2 ; RV32I-NEXT: addi a0, a0, -2032 ; RV32I-NEXT: sub sp, sp, a0 ; RV32I-NEXT: srli a0, sp, 12 ; RV32I-NEXT: slli sp, a0, 12 -; RV32I-NEXT: lui a0, 2 +; RV32I-NEXT: lui a0, 1 ; RV32I-NEXT: add a0, sp, a0 ; RV32I-NEXT: mv a0, a0 ; RV32I-NEXT: call callee@plt -; RV32I-NEXT: lui a0, 3 +; RV32I-NEXT: lui a0, 2 ; RV32I-NEXT: sub sp, s0, a0 -; RV32I-NEXT: lui a0, 3 +; RV32I-NEXT: lui a0, 2 ; RV32I-NEXT: addi a0, a0, -2032 ; RV32I-NEXT: add sp, sp, a0 ; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload @@ -492,18 +482,18 @@ define void @caller4096() nounwind { ; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill ; RV64I-NEXT: addi s0, sp, 2032 -; RV64I-NEXT: lui a0, 3 +; RV64I-NEXT: lui a0, 2 ; RV64I-NEXT: addiw a0, a0, -2032 ; RV64I-NEXT: sub sp, sp, a0 ; RV64I-NEXT: srli a0, sp, 12 ; RV64I-NEXT: slli sp, a0, 12 -; RV64I-NEXT: lui a0, 2 +; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: add a0, sp, a0 ; RV64I-NEXT: mv a0, a0 ; RV64I-NEXT: call callee@plt -; RV64I-NEXT: lui a0, 3 +; RV64I-NEXT: lui a0, 2 ; RV64I-NEXT: sub sp, s0, a0 -; RV64I-NEXT: lui a0, 3 +; RV64I-NEXT: lui a0, 2 ; RV64I-NEXT: addiw a0, a0, -2032 ; RV64I-NEXT: add sp, sp, a0 ; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload -- 2.7.4