From 52160f99d50b9781cb847d62ef23165d96323341 Mon Sep 17 00:00:00 2001 From: Liangfu Chen Date: Thu, 28 Nov 2019 14:45:58 +0800 Subject: [PATCH] fix multiple transfer issue in loaduop (#4442) --- vta/hardware/chisel/src/main/scala/core/LoadUop.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/vta/hardware/chisel/src/main/scala/core/LoadUop.scala b/vta/hardware/chisel/src/main/scala/core/LoadUop.scala index fcde836..3432ec6 100644 --- a/vta/hardware/chisel/src/main/scala/core/LoadUop.scala +++ b/vta/hardware/chisel/src/main/scala/core/LoadUop.scala @@ -173,7 +173,7 @@ class LoadUop(debug: Boolean = false)(implicit p: Parameters) extends Module { } } .elsewhen(io.vme_rd.data.fire()) { - when(xcnt === xlen - 1.U) { + when((xcnt === xlen - 1.U) && (xrem === 0.U)) { wmask := "b_01".U.asTypeOf(wmask) }.otherwise { wmask := "b_11".U.asTypeOf(wmask) @@ -183,7 +183,7 @@ class LoadUop(debug: Boolean = false)(implicit p: Parameters) extends Module { when(io.vme_rd.cmd.fire()) { wmask := "b_10".U.asTypeOf(wmask) }.elsewhen(io.vme_rd.data.fire()) { - when(sizeIsEven && xcnt === xlen - 1.U) { + when(sizeIsEven && (xcnt === xlen - 1.U) && (xrem === 0.U)) { wmask := "b_01".U.asTypeOf(wmask) }.otherwise { wmask := "b_11".U.asTypeOf(wmask) -- 2.7.4