From 51b22bd46888c972eb8c80ee5524d94f6f0b8996 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 24 Feb 2016 12:56:31 -0600 Subject: [PATCH] r600: Make enum alu_op_flags unsigned MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit In builds with clang, there are several errors related to the enum alu_op_flags like this: src/gallium/drivers/r600/sb/sb_expr.cpp:887:8: error: case value evaluates to -1610612736, which cannot be narrowed to type 'unsigned int' [-Wc++11-narrowing] These are due to the MSB being set in the enum. Fix these errors by making the enum values unsigned as needed. The flags field that stores this enum also needs to be unsigned. Cc: "11.1 11.2" Cc: Marek Olšák Signed-off-by: Rob Herring Reviewed-by: Michel Dänzer --- src/gallium/drivers/r600/r600_isa.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/r600/r600_isa.h b/src/gallium/drivers/r600/r600_isa.h index 27fc1e8..b3f49bd 100644 --- a/src/gallium/drivers/r600/r600_isa.h +++ b/src/gallium/drivers/r600/r600_isa.h @@ -102,13 +102,13 @@ enum alu_op_flags /* condition codes - 3 bits */ AF_CC_SHIFT = 29, - AF_CC_MASK = (7 << AF_CC_SHIFT), - AF_CC_E = (0 << AF_CC_SHIFT), - AF_CC_GT = (1 << AF_CC_SHIFT), - AF_CC_GE = (2 << AF_CC_SHIFT), - AF_CC_NE = (3 << AF_CC_SHIFT), - AF_CC_LT = (4 << AF_CC_SHIFT), - AF_CC_LE = (5 << AF_CC_SHIFT), + AF_CC_MASK = (7U << AF_CC_SHIFT), + AF_CC_E = (0U << AF_CC_SHIFT), + AF_CC_GT = (1U << AF_CC_SHIFT), + AF_CC_GE = (2U << AF_CC_SHIFT), + AF_CC_NE = (3U << AF_CC_SHIFT), + AF_CC_LT = (4U << AF_CC_SHIFT), + AF_CC_LE = (5U << AF_CC_SHIFT), }; /* flags for FETCH instructions (TEX/VTX) */ @@ -165,7 +165,7 @@ struct alu_op_info * (0 if instruction doesn't exist for chip class) */ int slots[4]; /* flags (mostly autogenerated from instruction name) */ - int flags; + unsigned int flags; }; /* FETCH instruction info */ -- 2.7.4