From 50a4005e351c7fb9b9494e8320df3212dc8207e0 Mon Sep 17 00:00:00 2001 From: Juergen Ributzka Date: Fri, 1 Aug 2014 18:39:24 +0000 Subject: [PATCH] [FastISel][AArch64] Add branch weights. Add branch weights to branch instructions, so that the following passes can optimize based on it (i.e. basic block ordering). Fixes . llvm-svn: 214537 --- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 43 +++++++++++++++++++--- .../CodeGen/AArch64/fast-isel-branch_weights.ll | 19 ++++++++++ 2 files changed, 57 insertions(+), 5 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/fast-isel-branch_weights.ll diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index bfbf10a..f748185 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -17,6 +17,7 @@ #include "AArch64Subtarget.h" #include "AArch64TargetMachine.h" #include "MCTargetDesc/AArch64AddressingModes.h" +#include "llvm/Analysis/BranchProbabilityInfo.h" #include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/FastISel.h" #include "llvm/CodeGen/FunctionLoweringInfo.h" @@ -843,7 +844,13 @@ bool AArch64FastISel::SelectBranch(const Instruction *I) { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::Bcc)) .addImm(CC) .addMBB(TBB); - FuncInfo.MBB->addSuccessor(TBB); + + // Obtain the branch weight and add the TrueBB to the successor list. + uint32_t BranchWeight = 0; + if (FuncInfo.BPI) + BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(), + TBB->getBasicBlock()); + FuncInfo.MBB->addSuccessor(TBB, BranchWeight); FastEmitBranch(FBB, DbgLoc); return true; @@ -881,7 +888,14 @@ bool AArch64FastISel::SelectBranch(const Instruction *I) { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::Bcc)) .addImm(CC) .addMBB(TBB); - FuncInfo.MBB->addSuccessor(TBB); + + // Obtain the branch weight and add the TrueBB to the successor list. + uint32_t BranchWeight = 0; + if (FuncInfo.BPI) + BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(), + TBB->getBasicBlock()); + FuncInfo.MBB->addSuccessor(TBB, BranchWeight); + FastEmitBranch(FBB, DbgLoc); return true; } @@ -891,7 +905,13 @@ bool AArch64FastISel::SelectBranch(const Instruction *I) { MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::B)) .addMBB(Target); - FuncInfo.MBB->addSuccessor(Target); + + // Obtain the branch weight and add the target to the successor list. + uint32_t BranchWeight = 0; + if (FuncInfo.BPI) + BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(), + Target->getBasicBlock()); + FuncInfo.MBB->addSuccessor(Target, BranchWeight); return true; } else if (foldXALUIntrinsic(CC, I, BI->getCondition())) { // Fake request the condition, otherwise the intrinsic might be completely @@ -904,7 +924,13 @@ bool AArch64FastISel::SelectBranch(const Instruction *I) { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::Bcc)) .addImm(CC) .addMBB(TBB); - FuncInfo.MBB->addSuccessor(TBB); + + // Obtain the branch weight and add the TrueBB to the successor list. + uint32_t BranchWeight = 0; + if (FuncInfo.BPI) + BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(), + TBB->getBasicBlock()); + FuncInfo.MBB->addSuccessor(TBB, BranchWeight); FastEmitBranch(FBB, DbgLoc); return true; @@ -935,7 +961,14 @@ bool AArch64FastISel::SelectBranch(const Instruction *I) { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::Bcc)) .addImm(CC) .addMBB(TBB); - FuncInfo.MBB->addSuccessor(TBB); + + // Obtain the branch weight and add the TrueBB to the successor list. + uint32_t BranchWeight = 0; + if (FuncInfo.BPI) + BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(), + TBB->getBasicBlock()); + FuncInfo.MBB->addSuccessor(TBB, BranchWeight); + FastEmitBranch(FBB, DbgLoc); return true; } diff --git a/llvm/test/CodeGen/AArch64/fast-isel-branch_weights.ll b/llvm/test/CodeGen/AArch64/fast-isel-branch_weights.ll new file mode 100644 index 0000000..f96fff1 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/fast-isel-branch_weights.ll @@ -0,0 +1,19 @@ +; RUN: llc -mtriple=arm64-apple-darwin -aarch64-atomic-cfg-tidy=0 < %s | FileCheck %s +; RUN: llc -mtriple=arm64-apple-darwin -aarch64-atomic-cfg-tidy=0 -fast-isel -fast-isel-abort < %s | FileCheck %s + +; Test if the BBs are reordred according to their branch weights. +define i64 @branch_weights_test(i64 %a, i64 %b) { +; CHECK-LABEL: branch_weights_test +; CHECK-LABEL: success +; CHECK-LABEL: fail + %1 = icmp ult i64 %a, %b + br i1 %1, label %fail, label %success, !prof !0 + +fail: + ret i64 -1 + +success: + ret i64 0 +} + +!0 = metadata !{metadata !"branch_weights", i32 0, i32 2147483647} -- 2.7.4