From 4fef4541f6cf1f5a1ab9329c741924b1b9fac5fc Mon Sep 17 00:00:00 2001 From: Robert Jong-A-Lock Date: Fri, 20 Jan 2012 15:05:25 +0100 Subject: [PATCH] [PORT FROM R2] atomisp: mt9e013: add D1 PAL and D1 NTSC to video res. table, timing update. BZ: 23295 Request from video team to add D1 PAL and D1 NTSC resolution to video table. Resolution uses binning and sensor scaling. Support for 20% DVS. Includes minor update to settings comments to improve readability. Unified timing information (ppl,lpf) for 720p and WVGA with other resolutions. Change-Id: Ibf64c35113fb4fe29791bc5c6106b81ca9599436 Orig-Change-Id: I2d7b9538ee583c4bf3ccbf836e11fe73c83ad7fe Reviewed-on: http://android.intel.com:8080/34897 Reviewed-by: Koski, Anttu Tested-by: Koski, Anttu Reviewed-by: buildbot Tested-by: buildbot --- drivers/media/video/mt9e013.c | 38 ++++++++++++++----- drivers/media/video/mt9e013.h | 88 +++++++++++++++++++++++++++++++++---------- 2 files changed, 97 insertions(+), 29 deletions(-) diff --git a/drivers/media/video/mt9e013.c b/drivers/media/video/mt9e013.c index 99d0bf6..fdba752 100644 --- a/drivers/media/video/mt9e013.c +++ b/drivers/media/video/mt9e013.c @@ -195,13 +195,37 @@ struct mt9e013_resolution mt9e013_res_video[] = { .skip_frames = 1, }, { + .desc = "mt9e013_D1PAL_strong_dvs_30fps" , + .width = 880 , + .height = 708 , + .fps = 30 , + .used = 0 , + .pixels_per_line = 0x1020, /* consistent with regs arrays */ + .lines_per_frame = 0x060E, /* consistent with regs arrays */ + .regs = mt9e013_D1PAL_strong_dvs_30fps , + .bin_factor_x = 2, + .bin_factor_y = 2, + }, + { + .desc = "mt9e013_D1NTSC_strong_dvs_30fps" , + .width = 904 , + .height = 602 , + .fps = 30 , + .used = 0 , + .pixels_per_line = 0x1020, /* consistent with regs arrays */ + .lines_per_frame = 0x060E, /* consistent with regs arrays */ + .regs = mt9e013_D1NTSC_strong_dvs_30fps , + .bin_factor_x = 2, + .bin_factor_y = 2, + }, + { .desc = "WVGA_strong_dvs_30fps" , .width = 1640 , .height = 1024 , .fps = 30 , .used = 0 , - .pixels_per_line = 0x156C, /* consistent with regs arrays */ - .lines_per_frame = 0x048F, /* consistent with regs arrays */ + .pixels_per_line = 0x1020, /* consistent with regs arrays */ + .lines_per_frame = 0x060E, /* consistent with regs arrays */ .regs = mt9e013_WVGA_strong_dvs_30fps , .bin_factor_x = 1, .bin_factor_y = 1, @@ -210,11 +234,11 @@ struct mt9e013_resolution mt9e013_res_video[] = { { .desc = "720p_strong_dvs_30fps" , .width = 1568 , - .height = 876 , + .height = 880 , .fps = 30 , .used = 0 , - .pixels_per_line = 0x156C, /* consistent with regs arrays */ - .lines_per_frame = 0x048F, /* consistent with regs arrays */ + .pixels_per_line = 0x1020, /* consistent with regs arrays */ + .lines_per_frame = 0x060E, /* consistent with regs arrays */ .regs = mt9e013_720p_strong_dvs_30fps , .bin_factor_x = 1, .bin_factor_y = 1, @@ -1575,10 +1599,6 @@ static int nearest_resolution_index(int w, int h) struct mt9e013_resolution *tmp_res = NULL; s32 m = LARGEST_ALLOWED_RATIO_MISMATCH; - /* Quick-and-dirty hack related 720p FOV bug. */ - if (w == 1552 && h == 880) - return 4; /* 720p_strong_dvs_30fps */ - for (j = 0; j < 2; ++j) { for (i = 0; i < N_RES; i++) { tmp_res = &mt9e013_res[i]; diff --git a/drivers/media/video/mt9e013.h b/drivers/media/video/mt9e013.h index 677bbab..ab86d87 100644 --- a/drivers/media/video/mt9e013.h +++ b/drivers/media/video/mt9e013.h @@ -643,7 +643,7 @@ static struct mt9e013_reg const mt9e013_STILL_8M_15fps[] = { {MT9E013_16BIT, {0x034A}, 0x099F }, /* Y_ADDR_END 2463 */ {MT9E013_16BIT, {0x034C}, 0x0CD0 }, /* X_OUTPUT_SIZE 3280 */ {MT9E013_16BIT, {0x034E}, 0x09A0 }, /* Y_OUTPUT_SIZE 2464 */ - {MT9E013_16BIT, {0x3040}, 0x0041 }, /* READ_MODE 65 */ + {MT9E013_16BIT, {0x3040}, 0x0041 }, /* READ_MODE 0 0 0 0 0 0 0 1 1 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x0}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0078 }, /* FINE_CORRECTION 120 */ @@ -667,7 +667,7 @@ static struct mt9e013_reg const mt9e013_STILL_6M_15fps[] = { {MT9E013_16BIT, {0x034A}, 0x086D }, /* Y_ADDR_END 2157 */ {MT9E013_16BIT, {0x034C}, 0x0CD0 }, /* X_OUTPUT_SIZE 3280 */ {MT9E013_16BIT, {0x034E}, 0x0738 }, /* Y_OUTPUT_SIZE 1848 */ - {MT9E013_16BIT, {0x3040}, 0x0041 }, /* READ_MODE 65 */ + {MT9E013_16BIT, {0x3040}, 0x0041 }, /* READ_MODE 0 0 0 0 0 0 0 1 1 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x0}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0078 }, /* FINE_CORRECTION 120 */ @@ -691,7 +691,7 @@ static struct mt9e013_reg const mt9e013_STILL_2M_15fps[] = { {MT9E013_16BIT, {0x034A}, 0x09A1 }, /* Y_ADDR_END 2465 */ {MT9E013_16BIT, {0x034C}, 0x0668 }, /* X_OUTPUT_SIZE 1640 */ {MT9E013_16BIT, {0x034E}, 0x04D0 }, /* Y_OUTPUT_SIZE 1232 */ - {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 1219 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ @@ -716,7 +716,7 @@ static struct mt9e013_reg const mt9e013_PREVIEW_30fps[] = { {MT9E013_16BIT, {0x034A}, 0x099F }, /* Y_ADDR_END 2463 */ {MT9E013_16BIT, {0x034C}, 0x0334 }, /* X_OUTPUT_SIZE 820 */ {MT9E013_16BIT, {0x034E}, 0x0268 }, /* Y_OUTPUT_SIZE 616 */ - {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 1219 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ @@ -740,7 +740,7 @@ static struct mt9e013_reg const mt9e013_WIDE_PREVIEW_30fps[] = { {MT9E013_16BIT, {0x034A}, 0x088D }, /* Y_ADDR_END 2189 */ {MT9E013_16BIT, {0x034C}, 0x0668 }, /* X_OUTPUT_SIZE 1640 */ {MT9E013_16BIT, {0x034E}, 0x03BC }, /* Y_OUTPUT_SIZE 956 */ - {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 1219 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ @@ -765,7 +765,7 @@ static struct mt9e013_reg const mt9e013_1080p_strong_dvs_30fps[] = { {MT9E013_16BIT, {0x034A}, 0x075D }, /* Y_ADDR_END 1885 */ {MT9E013_16BIT, {0x034C}, 0x0920 }, /* X_OUTPUT_SIZE 2336 */ {MT9E013_16BIT, {0x034E}, 0x051C }, /* Y_OUTPUT_SIZE 1308 */ - {MT9E013_16BIT, {0x3040}, 0x0041 }, /* READ_MODE 65 */ + {MT9E013_16BIT, {0x3040}, 0x0041 }, /* READ_MODE 0 0 0 0 0 0 0 1 1 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x0}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0078 }, /* FINE_CORRECTION 120 */ @@ -781,19 +781,19 @@ static struct mt9e013_reg const mt9e013_720p_strong_dvs_30fps[] = { /* 720p strong dvs */ GROUPED_PARAMETER_HOLD_ENABLE, /* Frame size & Timing Configuration*/ - {MT9E013_16BIT, {0x0340}, 0x048F }, /* FRAME_LENGTH_LINES 1167 */ - {MT9E013_16BIT, {0x0342}, 0x156C }, /* LINE_LENGTH_PCK 5484 */ + {MT9E013_16BIT, {0x0340}, 0x060E }, /* FRAME_LENGTH_LINES 1550 */ + {MT9E013_16BIT, {0x0342}, 0x1020 }, /* LINE_LENGTH_PCK 4128 */ {MT9E013_16BIT, {0x0344}, 0x0048 }, /* X_ADDR_START 72 */ - {MT9E013_16BIT, {0x0346}, 0x0164 }, /* Y_ADDR_START 356 */ + {MT9E013_16BIT, {0x0346}, 0x0160 }, /* Y_ADDR_START 352 */ {MT9E013_16BIT, {0x0348}, 0x0C89 }, /* X_ADDR_END 3209 */ - {MT9E013_16BIT, {0x034A}, 0x083D }, /* Y_ADDR_END 2109 */ + {MT9E013_16BIT, {0x034A}, 0x083F }, /* Y_ADDR_END 2111 */ {MT9E013_16BIT, {0x034C}, 0x0620 }, /* X_OUTPUT_SIZE 1568 */ - {MT9E013_16BIT, {0x034E}, 0x036C }, /* Y_OUTPUT_SIZE 876 */ - {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 1219 */ + {MT9E013_16BIT, {0x034E}, 0x0370 }, /* Y_OUTPUT_SIZE 880 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ - {MT9E013_16BIT, {0X3012}, 0x048F }, /* COARSE_INTEGRATION_TIME 1167 */ + {MT9E013_16BIT, {0X3012}, 0x0573 }, /* COARSE_INTEGRATION_TIME 1395 */ {MT9E013_16BIT, {0X3014}, 0x0846 }, /* FINE_INTEGRATION_TIME 2118 */ /* Scaler configuration */ {MT9E013_16BIT, {0x0400}, 0x0002 }, /* SCALE_MODE 2 */ @@ -805,19 +805,19 @@ static struct mt9e013_reg const mt9e013_WVGA_strong_dvs_30fps[] = { /* WVGA strong dvs */ GROUPED_PARAMETER_HOLD_ENABLE, /* Frame size & Timing Configuration*/ - {MT9E013_16BIT, {0x0340}, 0x048F }, /* FRAME_LENGTH_LINES 1167 */ - {MT9E013_16BIT, {0x0342}, 0x156C }, /* LINE_LENGTH_PCK 5484 */ + {MT9E013_16BIT, {0x0340}, 0x060E }, /* FRAME_LENGTH_LINES 1550 */ + {MT9E013_16BIT, {0x0342}, 0x1020 }, /* LINE_LENGTH_PCK 4128 */ {MT9E013_16BIT, {0x0344}, 0x0000 }, /* X_ADDR_START 0 */ {MT9E013_16BIT, {0x0346}, 0x00D0 }, /* Y_ADDR_START 208 */ {MT9E013_16BIT, {0x0348}, 0x0CCD }, /* X_ADDR_END 3277 */ {MT9E013_16BIT, {0x034A}, 0x08CD }, /* Y_ADDR_END 2253 */ {MT9E013_16BIT, {0x034C}, 0x0668 }, /* X_OUTPUT_SIZE 1640 */ {MT9E013_16BIT, {0x034E}, 0x0400 }, /* Y_OUTPUT_SIZE 1024 */ - {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 1219 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ - {MT9E013_16BIT, {0X3012}, 0x048F }, /* COARSE_INTEGRATION_TIME 1167 */ + {MT9E013_16BIT, {0X3012}, 0x0573 }, /* COARSE_INTEGRATION_TIME 1395 */ {MT9E013_16BIT, {0X3014}, 0x0846 }, /* FINE_INTEGRATION_TIME 2118 */ /* Scaler configuration */ {MT9E013_16BIT, {0x0400}, 0x0000 }, /* SCALE_MODE 0 */ @@ -825,6 +825,54 @@ static struct mt9e013_reg const mt9e013_WVGA_strong_dvs_30fps[] = { {MT9E013_TOK_TERM, {0}, 0} }; +static struct mt9e013_reg const mt9e013_D1PAL_strong_dvs_30fps[] = { + /* D1PAL strong dvs */ + GROUPED_PARAMETER_HOLD_ENABLE, + /* Frame size & Timing Configuration*/ + {MT9E013_16BIT, {0x0340}, 0x060E }, /* FRAME_LENGTH_LINES 1550 */ + {MT9E013_16BIT, {0x0342}, 0x1020 }, /* LINE_LENGTH_PCK 4128 */ + {MT9E013_16BIT, {0x0344}, 0x0134 }, /* X_ADDR_START 308 */ + {MT9E013_16BIT, {0x0346}, 0x0024 }, /* Y_ADDR_START 36 */ + {MT9E013_16BIT, {0x0348}, 0x0B9B }, /* X_ADDR_END 2971 */ + {MT9E013_16BIT, {0x034A}, 0x0957 }, /* Y_ADDR_END 2391 */ + {MT9E013_16BIT, {0x034C}, 0x0370 }, /* X_OUTPUT_SIZE 880 */ + {MT9E013_16BIT, {0x034E}, 0x02C4 }, /* Y_OUTPUT_SIZE 708 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ + {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ + /* Initial integration time */ + {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ + {MT9E013_16BIT, {0X3012}, 0x0573 }, /* COARSE_INTEGRATION_TIME 1395 */ + {MT9E013_16BIT, {0X3014}, 0x0846 }, /* FINE_INTEGRATION_TIME 2118 */ + /* Scaler configuration */ + {MT9E013_16BIT, {0x0400}, 0x0002 }, /* SCALE_MODE 2 */ + {MT9E013_16BIT, {0x0404}, 0x001B }, /* SCALE_M 27 */ + {MT9E013_TOK_TERM, {0}, 0} +}; + +static struct mt9e013_reg const mt9e013_D1NTSC_strong_dvs_30fps[] = { + /* D1NTSC strong dvs */ + GROUPED_PARAMETER_HOLD_ENABLE, + /* Frame size & Timing Configuration*/ + {MT9E013_16BIT, {0x0340}, 0x060E }, /* FRAME_LENGTH_LINES 1550 */ + {MT9E013_16BIT, {0x0342}, 0x1020 }, /* LINE_LENGTH_PCK 4128 */ + {MT9E013_16BIT, {0x0344}, 0x0000 }, /* X_ADDR_START 0 */ + {MT9E013_16BIT, {0x0346}, 0x008C }, /* Y_ADDR_START 140 */ + {MT9E013_16BIT, {0x0348}, 0x0CCF }, /* X_ADDR_END 3279 */ + {MT9E013_16BIT, {0x034A}, 0x0887 }, /* Y_ADDR_END 2183 */ + {MT9E013_16BIT, {0x034C}, 0x0388 }, /* X_OUTPUT_SIZE 904 */ + {MT9E013_16BIT, {0x034E}, 0x025A }, /* Y_OUTPUT_SIZE 602 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ + {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ + /* Initial integration time */ + {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ + {MT9E013_16BIT, {0X3012}, 0x0573 }, /* COARSE_INTEGRATION_TIME 1395 */ + {MT9E013_16BIT, {0X3014}, 0x0846 }, /* FINE_INTEGRATION_TIME 2118 */ + /* Scaler configuration */ + {MT9E013_16BIT, {0x0400}, 0x0002 }, /* SCALE_MODE 2 */ + {MT9E013_16BIT, {0x0404}, 0x001D }, /* SCALE_M 29 */ + {MT9E013_TOK_TERM, {0}, 0} +}; + static struct mt9e013_reg const mt9e013_VGA_strong_dvs_30fps[] = { /* VGA strong dvs */ GROUPED_PARAMETER_HOLD_ENABLE, @@ -837,7 +885,7 @@ static struct mt9e013_reg const mt9e013_VGA_strong_dvs_30fps[] = { {MT9E013_16BIT, {0x034A}, 0x099F }, /* Y_ADDR_END 2463 */ {MT9E013_16BIT, {0x034C}, 0x0334 }, /* X_OUTPUT_SIZE 820 */ {MT9E013_16BIT, {0x034E}, 0x0268 }, /* Y_OUTPUT_SIZE 616 */ - {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 1219 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ @@ -861,7 +909,7 @@ static struct mt9e013_reg const mt9e013_QVGA_strong_dvs_30fps[] = { {MT9E013_16BIT, {0x034A}, 0x099F }, /* Y_ADDR_END 2463 */ {MT9E013_16BIT, {0x034C}, 0x0198 }, /* X_OUTPUT_SIZE 408 */ {MT9E013_16BIT, {0x034E}, 0x0134 }, /* Y_OUTPUT_SIZE 308 */ - {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 1219 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ @@ -885,7 +933,7 @@ static struct mt9e013_reg const mt9e013_QCIF_strong_dvs_30fps[] = { {MT9E013_16BIT, {0x034A}, 0x099F }, /* Y_ADDR_END 2463 */ {MT9E013_16BIT, {0x034C}, 0x00D8 }, /* X_OUTPUT_SIZE 216 */ {MT9E013_16BIT, {0x034E}, 0x00B0 }, /* Y_OUTPUT_SIZE 176 */ - {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 1219 */ + {MT9E013_16BIT, {0x3040}, 0x04C3 }, /* READ_MODE 0 0 0 0 0 1 0 3 3 */ {MT9E013_16BIT | MT9E013_RMW, {0x306E}, 0x0010, 0x1}, /* DATAPATH_SELECT_TRUE_BAYER */ /* Initial integration time */ {MT9E013_16BIT, {0x3010}, 0x0130 }, /* FINE_CORRECTION 304 */ -- 2.7.4