From 4f992de4f369e17b64a66246ec35bf75f41dc98d Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 24 Mar 2021 11:22:35 +0100 Subject: [PATCH] arm: Fix some more vec-common.md patterns for iwmmxt [PR99724] The following patch fixes similar issues as in PR98849; in older gcc versions, the expanders were present in neon.md guarded with TARGET_NEON, but they got moved to vec-common.md and guarded with ARM_HAVE__ARITH so that they handle both MVE and Neon. The macros are enabled for some modes even for iwmmxt which has some vector support for those modes, but only limited. In particular, neither the one_cmpl, nor neg, nor movmisalign patterns are present. For some reason I've failed to construct something that ICEs with movmisalign, so that is not covered by the testsuite, but both one_cmpl and neg ICE. 2021-03-24 Jakub Jelinek PR target/99724 * config/arm/vec-common.md (one_cmpl2, neg2, movmisalign): Disable expanders for TARGET_REALLY_IWMMXT. * gcc.target/arm/pr99724.c: New test. --- gcc/config/arm/vec-common.md | 7 ++++--- gcc/testsuite/gcc.target/arm/pr99724.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/pr99724.c diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index 0e13187..48ee659 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -202,13 +202,13 @@ (define_expand "one_cmpl2" [(set (match_operand:VDQ 0 "s_register_operand") (not:VDQ (match_operand:VDQ 1 "s_register_operand")))] - "ARM_HAVE__ARITH" + "ARM_HAVE__ARITH && !TARGET_REALLY_IWMMXT" ) (define_expand "neg2" [(set (match_operand:VDQWH 0 "s_register_operand" "") (neg:VDQWH (match_operand:VDQWH 1 "s_register_operand" "")))] - "ARM_HAVE__ARITH" + "ARM_HAVE__ARITH && !TARGET_REALLY_IWMMXT" ) (define_expand "cadd3" @@ -281,7 +281,8 @@ [(set (match_operand:VDQX 0 "neon_perm_struct_or_reg_operand") (unspec:VDQX [(match_operand:VDQX 1 "neon_perm_struct_or_reg_operand")] UNSPEC_MISALIGNED_ACCESS))] - "ARM_HAVE__LDST && !BYTES_BIG_ENDIAN && unaligned_access" + "ARM_HAVE__LDST && !BYTES_BIG_ENDIAN + && unaligned_access && !TARGET_REALLY_IWMMXT" { rtx adjust_mem; /* This pattern is not permitted to fail during expansion: if both arguments diff --git a/gcc/testsuite/gcc.target/arm/pr99724.c b/gcc/testsuite/gcc.target/arm/pr99724.c new file mode 100644 index 0000000..5411078 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr99724.c @@ -0,0 +1,31 @@ +/* PR target/99724 */ +/* { dg-do compile } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-require-effective-target arm_iwmmxt_ok } */ +/* { dg-options "-O1 -mcpu=iwmmxt" } */ + +typedef int V __attribute__((vector_size (8))); +struct __attribute__((packed)) S { char a; V b; char c[7]; }; + +void +foo (V *x) +{ + *x = ~*x; +} + +void +bar (V *x) +{ + *x = -*x; +} + +void +baz (V *x, struct S *p) +{ + V y = p->b; + *x = y; +} -- 2.7.4