From 4f1c415cc46184d9929f198240eb4e9d22aa91d8 Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Wed, 19 Oct 2016 10:19:27 +1100 Subject: [PATCH] i965: switch tes over to shared shader_info Note we access shader_info from the program struct rather than the nir_shader pointer because shader cache won't create a nir_shader. Reviewed-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/brw_tcs.c | 6 +++--- src/mesa/drivers/dri/i965/brw_tes.c | 10 +++++----- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c index 8a78a40..345aa7f 100644 --- a/src/mesa/drivers/dri/i965/brw_tcs.c +++ b/src/mesa/drivers/dri/i965/brw_tcs.c @@ -341,10 +341,10 @@ brw_tcs_populate_key(struct brw_context *brw, /* We need to specialize our code generation for tessellation levels * based on the domain the DS is expecting to tessellate. */ - key->tes_primitive_mode = tep->program.PrimitiveMode; + key->tes_primitive_mode = tep->program.Base.info.tes.primitive_mode; key->quads_workaround = brw->gen < 9 && - tep->program.PrimitiveMode == GL_QUADS && - tep->program.Spacing == GL_EQUAL; + tep->program.Base.info.tes.primitive_mode == GL_QUADS && + tep->program.Base.info.tes.spacing == GL_EQUAL; if (tcp) { key->program_string_id = tcp->id; diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c index fe03816..fed1975 100644 --- a/src/mesa/drivers/dri/i965/brw_tes.c +++ b/src/mesa/drivers/dri/i965/brw_tes.c @@ -96,7 +96,7 @@ brw_codegen_tes_prog(struct brw_context *brw, shader_prog, &tep->program.Base, &prog_data.base.base, 0); - switch (tep->program.Spacing) { + switch (tep->program.Base.info.tes.spacing) { case GL_EQUAL: prog_data.partitioning = BRW_TESS_PARTITIONING_INTEGER; break; @@ -110,7 +110,7 @@ brw_codegen_tes_prog(struct brw_context *brw, unreachable("invalid domain shader spacing"); } - switch (tep->program.PrimitiveMode) { + switch (tep->program.Base.info.tes.primitive_mode) { case GL_QUADS: prog_data.domain = BRW_TESS_DOMAIN_QUAD; break; @@ -124,13 +124,13 @@ brw_codegen_tes_prog(struct brw_context *brw, unreachable("invalid domain shader primitive mode"); } - if (tep->program.PointMode) { + if (tep->program.Base.info.tes.point_mode) { prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_POINT; - } else if (tep->program.PrimitiveMode == GL_ISOLINES) { + } else if (tep->program.Base.info.tes.primitive_mode == GL_ISOLINES) { prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_LINE; } else { /* Hardware winding order is backwards from OpenGL */ - switch (tep->program.VertexOrder) { + switch (tep->program.Base.info.tes.vertex_order) { case GL_CCW: prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_TRI_CW; break; -- 2.7.4