From 4f17d75b24ee3f75fb9755461c04a73ed2f018f8 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 23 Mar 2023 09:42:45 +0000 Subject: [PATCH] [X86] LowerVectorAllZero - early out if the type size is not pow2. NFC. --- llvm/lib/Target/X86/X86ISelLowering.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 6cf359d..e828fe4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -24167,6 +24167,10 @@ static SDValue LowerVectorAllZero(const SDLoc &DL, SDValue V, ISD::CondCode CC, return SDValue(); } + // Quit if not convertable to legal scalar or 128/256-bit vector. + if (!llvm::has_single_bit(VT.getSizeInBits())) + return SDValue(); + assert((CC == ISD::SETEQ || CC == ISD::SETNE) && "Unsupported ISD::CondCode"); X86CC = (CC == ISD::SETEQ ? X86::COND_E : X86::COND_NE); @@ -24188,10 +24192,6 @@ static SDValue LowerVectorAllZero(const SDLoc &DL, SDValue V, ISD::CondCode CC, DAG.getConstant(0, DL, IntVT)); } - // Quit if not splittable to 128/256-bit vector. - if (!llvm::has_single_bit(VT.getSizeInBits())) - return SDValue(); - // Split down to 128/256-bit vector. unsigned TestSize = Subtarget.hasAVX() ? 256 : 128; while (VT.getSizeInBits() > TestSize) { -- 2.7.4