From 4f171d2761753a7664ddcc27cdd53770c6e59d7c Mon Sep 17 00:00:00 2001 From: Ganesh Gopalasubramanian Date: Tue, 26 Feb 2019 17:15:36 +0000 Subject: [PATCH] [X86] AMD znver2 enablement This patch enables the following 1) AMD family 17h "znver2" tune flag (-march, -mcpu). 2) ISAs that are enabled for "znver2" architecture. 3) For the time being, it uses the znver1 scheduler model. 4) Tests are updated. 5) This patch is the clang counterpart to D58343 Reviewers: craig.topper Tags: #clang Differential Revision: https://reviews.llvm.org/D58344 llvm-svn: 354899 --- clang/include/clang/Basic/X86Target.def | 1 + clang/lib/Basic/Targets/X86.cpp | 8 ++ clang/test/CodeGen/target-builtin-noerror.c | 1 + clang/test/Driver/x86-march.c | 4 + clang/test/Frontend/x86-target-cpu.c | 1 + clang/test/Misc/target-invalid-cpu-note.c | 4 +- clang/test/Preprocessor/predefined-arch-macros.c | 94 ++++++++++++++++++++++++ 7 files changed, 111 insertions(+), 2 deletions(-) diff --git a/clang/include/clang/Basic/X86Target.def b/clang/include/clang/Basic/X86Target.def index c6719ff..5776f64 100644 --- a/clang/include/clang/Basic/X86Target.def +++ b/clang/include/clang/Basic/X86Target.def @@ -236,6 +236,7 @@ PROC_WITH_FEAT(BDVER4, "bdver4", PROC_64_BIT, FEATURE_AVX2) /// Zen architecture processors. //@{ PROC_WITH_FEAT(ZNVER1, "znver1", PROC_64_BIT, FEATURE_AVX2) +PROC_WITH_FEAT(ZNVER2, "znver2", PROC_64_BIT, FEATURE_AVX2) //@} /// This specification is deprecated and will be removed in the future. diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index c338503..69a766c 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -347,6 +347,11 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "sahf", true); break; + case CK_ZNVER2: + setFeatureEnabledImpl(Features, "clwb", true); + setFeatureEnabledImpl(Features, "rdpid", true); + setFeatureEnabledImpl(Features, "wbnoinvd", true); + LLVM_FALLTHROUGH; case CK_ZNVER1: setFeatureEnabledImpl(Features, "adx", true); setFeatureEnabledImpl(Features, "aes", true); @@ -1030,6 +1035,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts, case CK_ZNVER1: defineCPUMacros(Builder, "znver1"); break; + case CK_ZNVER2: + defineCPUMacros(Builder, "znver2"); + break; case CK_Geode: defineCPUMacros(Builder, "geode"); break; diff --git a/clang/test/CodeGen/target-builtin-noerror.c b/clang/test/CodeGen/target-builtin-noerror.c index 400c5e6..f8d73ef 100644 --- a/clang/test/CodeGen/target-builtin-noerror.c +++ b/clang/test/CodeGen/target-builtin-noerror.c @@ -120,4 +120,5 @@ void verifycpustrings() { (void)__builtin_cpu_is("tremont"); (void)__builtin_cpu_is("westmere"); (void)__builtin_cpu_is("znver1"); + (void)__builtin_cpu_is("znver2"); } diff --git a/clang/test/Driver/x86-march.c b/clang/test/Driver/x86-march.c index bc1194f..5edc890 100644 --- a/clang/test/Driver/x86-march.c +++ b/clang/test/Driver/x86-march.c @@ -159,3 +159,7 @@ // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver1 2>&1 \ // RUN: | FileCheck %s -check-prefix=znver1 // znver1: "-target-cpu" "znver1" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver2 2>&1 \ +// RUN: | FileCheck %s -check-prefix=znver2 +// znver2: "-target-cpu" "znver2" diff --git a/clang/test/Frontend/x86-target-cpu.c b/clang/test/Frontend/x86-target-cpu.c index 0ec301f..05b28f0 100644 --- a/clang/test/Frontend/x86-target-cpu.c +++ b/clang/test/Frontend/x86-target-cpu.c @@ -35,5 +35,6 @@ // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu btver1 -verify %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu btver2 -verify %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver1 -verify %s +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver2 -verify %s // // expected-no-diagnostics diff --git a/clang/test/Misc/target-invalid-cpu-note.c b/clang/test/Misc/target-invalid-cpu-note.c index 7a37edaa..5af321b 100644 --- a/clang/test/Misc/target-invalid-cpu-note.c +++ b/clang/test/Misc/target-invalid-cpu-note.c @@ -19,7 +19,7 @@ // X86-SAME: skx, cascadelake, cannonlake, icelake-client, icelake-server, knl, knm, lakemont, k6, k6-2, k6-3, // X86-SAME: athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64, // X86-SAME: athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, -// X86-SAME: barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, +// X86-SAME: barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, // X86-SAME: x86-64, geode // RUN: not %clang_cc1 -triple x86_64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86_64 @@ -30,7 +30,7 @@ // X86_64-SAME: core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cannonlake, // X86_64-SAME: icelake-client, icelake-server, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3, // X86_64-SAME: athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, -// X86_64-SAME: btver2, bdver1, bdver2, bdver3, bdver4, znver1, x86-64 +// X86_64-SAME: btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, x86-64 // RUN: not %clang_cc1 -triple nvptx--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix NVPTX // NVPTX: error: unknown target CPU 'not-a-cpu' diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index 65d3a3e..f98f0ee 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -2676,6 +2676,100 @@ // CHECK_ZNVER1_M64: #define __znver1 1 // CHECK_ZNVER1_M64: #define __znver1__ 1 +// RUN: %clang -march=znver2 -m32 -E -dM %s -o - 2>&1 \ +// RUN: -target i386-unknown-linux \ +// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ZNVER2_M32 +// CHECK_ZNVER2_M32-NOT: #define __3dNOW_A__ 1 +// CHECK_ZNVER2_M32-NOT: #define __3dNOW__ 1 +// CHECK_ZNVER2_M32: #define __ADX__ 1 +// CHECK_ZNVER2_M32: #define __AES__ 1 +// CHECK_ZNVER2_M32: #define __AVX2__ 1 +// CHECK_ZNVER2_M32: #define __AVX__ 1 +// CHECK_ZNVER2_M32: #define __BMI2__ 1 +// CHECK_ZNVER2_M32: #define __BMI__ 1 +// CHECK_ZNVER2_M32: #define __CLFLUSHOPT__ 1 +// CHECK_ZNVER2_M32: #define __CLWB__ 1 +// CHECK_ZNVER2_M32: #define __CLZERO__ 1 +// CHECK_ZNVER2_M32: #define __F16C__ 1 +// CHECK_ZNVER2_M32: #define __FMA__ 1 +// CHECK_ZNVER2_M32: #define __FSGSBASE__ 1 +// CHECK_ZNVER2_M32: #define __LZCNT__ 1 +// CHECK_ZNVER2_M32: #define __MMX__ 1 +// CHECK_ZNVER2_M32: #define __PCLMUL__ 1 +// CHECK_ZNVER2_M32: #define __POPCNT__ 1 +// CHECK_ZNVER2_M32: #define __PRFCHW__ 1 +// CHECK_ZNVER2_M32: #define __RDPID__ 1 +// CHECK_ZNVER2_M32: #define __RDRND__ 1 +// CHECK_ZNVER2_M32: #define __RDSEED__ 1 +// CHECK_ZNVER2_M32: #define __SHA__ 1 +// CHECK_ZNVER2_M32: #define __SSE2_MATH__ 1 +// CHECK_ZNVER2_M32: #define __SSE2__ 1 +// CHECK_ZNVER2_M32: #define __SSE3__ 1 +// CHECK_ZNVER2_M32: #define __SSE4A__ 1 +// CHECK_ZNVER2_M32: #define __SSE4_1__ 1 +// CHECK_ZNVER2_M32: #define __SSE4_2__ 1 +// CHECK_ZNVER2_M32: #define __SSE_MATH__ 1 +// CHECK_ZNVER2_M32: #define __SSE__ 1 +// CHECK_ZNVER2_M32: #define __SSSE3__ 1 +// CHECK_ZNVER2_M32: #define __WBNOINVD__ 1 +// CHECK_ZNVER2_M32: #define __XSAVEC__ 1 +// CHECK_ZNVER2_M32: #define __XSAVEOPT__ 1 +// CHECK_ZNVER2_M32: #define __XSAVES__ 1 +// CHECK_ZNVER2_M32: #define __XSAVE__ 1 +// CHECK_ZNVER2_M32: #define __i386 1 +// CHECK_ZNVER2_M32: #define __i386__ 1 +// CHECK_ZNVER2_M32: #define __tune_znver2__ 1 +// CHECK_ZNVER2_M32: #define __znver2 1 +// CHECK_ZNVER2_M32: #define __znver2__ 1 + +// RUN: %clang -march=znver2 -m64 -E -dM %s -o - 2>&1 \ +// RUN: -target i386-unknown-linux \ +// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ZNVER2_M64 +// CHECK_ZNVER2_M64-NOT: #define __3dNOW_A__ 1 +// CHECK_ZNVER2_M64-NOT: #define __3dNOW__ 1 +// CHECK_ZNVER2_M64: #define __ADX__ 1 +// CHECK_ZNVER2_M64: #define __AES__ 1 +// CHECK_ZNVER2_M64: #define __AVX2__ 1 +// CHECK_ZNVER2_M64: #define __AVX__ 1 +// CHECK_ZNVER2_M64: #define __BMI2__ 1 +// CHECK_ZNVER2_M64: #define __BMI__ 1 +// CHECK_ZNVER2_M64: #define __CLFLUSHOPT__ 1 +// CHECK_ZNVER2_M64: #define __CLWB__ 1 +// CHECK_ZNVER2_M64: #define __CLZERO__ 1 +// CHECK_ZNVER2_M64: #define __F16C__ 1 +// CHECK_ZNVER2_M64: #define __FMA__ 1 +// CHECK_ZNVER2_M64: #define __FSGSBASE__ 1 +// CHECK_ZNVER2_M64: #define __LZCNT__ 1 +// CHECK_ZNVER2_M64: #define __MMX__ 1 +// CHECK_ZNVER2_M64: #define __PCLMUL__ 1 +// CHECK_ZNVER2_M64: #define __POPCNT__ 1 +// CHECK_ZNVER2_M64: #define __PRFCHW__ 1 +// CHECK_ZNVER2_M64: #define __RDPID__ 1 +// CHECK_ZNVER2_M64: #define __RDRND__ 1 +// CHECK_ZNVER2_M64: #define __RDSEED__ 1 +// CHECK_ZNVER2_M64: #define __SHA__ 1 +// CHECK_ZNVER2_M64: #define __SSE2_MATH__ 1 +// CHECK_ZNVER2_M64: #define __SSE2__ 1 +// CHECK_ZNVER2_M64: #define __SSE3__ 1 +// CHECK_ZNVER2_M64: #define __SSE4A__ 1 +// CHECK_ZNVER2_M64: #define __SSE4_1__ 1 +// CHECK_ZNVER2_M64: #define __SSE4_2__ 1 +// CHECK_ZNVER2_M64: #define __SSE_MATH__ 1 +// CHECK_ZNVER2_M64: #define __SSE__ 1 +// CHECK_ZNVER2_M64: #define __SSSE3__ 1 +// CHECK_ZNVER2_M64: #define __WBNOINVD__ 1 +// CHECK_ZNVER2_M64: #define __XSAVEC__ 1 +// CHECK_ZNVER2_M64: #define __XSAVEOPT__ 1 +// CHECK_ZNVER2_M64: #define __XSAVES__ 1 +// CHECK_ZNVER2_M64: #define __XSAVE__ 1 +// CHECK_ZNVER2_M64: #define __amd64 1 +// CHECK_ZNVER2_M64: #define __amd64__ 1 +// CHECK_ZNVER2_M64: #define __tune_znver2__ 1 +// CHECK_ZNVER2_M64: #define __x86_64 1 +// CHECK_ZNVER2_M64: #define __x86_64__ 1 +// CHECK_ZNVER2_M64: #define __znver2 1 +// CHECK_ZNVER2_M64: #define __znver2__ 1 + // End X86/GCC/Linux tests ------------------ // Begin PPC/GCC/Linux tests ---------------- -- 2.7.4