From 4ec6e65c7060ef1c76889fc75599a62b48e25fa5 Mon Sep 17 00:00:00 2001 From: Zongdong Jiao Date: Thu, 1 Aug 2019 14:43:18 +0800 Subject: [PATCH] eARCrx: add hdmitx hpd notify [1/1] PD#SWPL-6861 Problem: Wrong val for init bandgap Solution: If PHY_CNTL0 is 0, then enable it, otherwise no need. Verify: SM1/AC200 Change-Id: I9e4a7bbe5d4b02cd8e9b2d5da87b4e572bdeb67e Signed-off-by: Zongdong Jiao --- drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c index b6ffa51..2185452 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c @@ -644,12 +644,17 @@ void HDMITX_Meson_Init(struct hdmitx_dev *hdev) static void hdmitx_phy_bandgap_en(struct hdmitx_dev *hdev) { + unsigned int val = 0; switch (hdev->chip_type) { case MESON_CPU_ID_TM2: - hd_write_reg(P_TM2_HHI_HDMI_PHY_CNTL0, 0x0b4242); + val = hd_read_reg(P_TM2_HHI_HDMI_PHY_CNTL0); + if (val == 0) + hd_write_reg(P_TM2_HHI_HDMI_PHY_CNTL0, 0x0b4242); break; case MESON_CPU_ID_SM1: - hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x0b4242); + val = hd_read_reg(P_HHI_HDMI_PHY_CNTL0); + if (val == 0) + hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x0b4242); break; default: break; -- 2.7.4