From 4dc0a7cae212a3a9fb292e19b91f06012fc70d65 Mon Sep 17 00:00:00 2001 From: Michal Wajdeczko Date: Tue, 29 Oct 2019 09:58:54 +0000 Subject: [PATCH] drm/i915: Don't try to place HWS in non-existing mappable region HWS placement restrictions can't just rely on HAS_LLC flag. Signed-off-by: Michal Wajdeczko Signed-off-by: Matthew Auld Cc: Daniele Ceraolo Spurio Acked-by: Chris Wilson Signed-off-by: Chris Wilson Link: https://patchwork.freedesktop.org/patch/msgid/20191029095856.25431-5-matthew.auld@intel.com --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 9cc1ea6..3555231 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -528,7 +528,7 @@ static int pin_ggtt_status_page(struct intel_engine_cs *engine, unsigned int flags; flags = PIN_GLOBAL; - if (!HAS_LLC(engine->i915)) + if (!HAS_LLC(engine->i915) && i915_ggtt_has_aperture(engine->gt->ggtt)) /* * On g33, we cannot place HWS above 256MiB, so * restrict its pinning to the low mappable arena. -- 2.7.4