From 4d5456543628932794b872f00672b821b7bfbe56 Mon Sep 17 00:00:00 2001 From: David Stuttard Date: Tue, 18 Apr 2023 11:38:49 +0100 Subject: [PATCH] [AMDGPU] Remove unnecessary assert Also remove the function attributes from the test. For PAL based shaders this isn't required. Differential Revision: https://reviews.llvm.org/D148625 --- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 11 ----------- llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll | 2 +- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp index 1d29be9..fb3ce11 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp @@ -1059,17 +1059,6 @@ void AMDGPUAsmPrinter::EmitPALMetadata(const MachineFunction &MF, MD->setHwStage(CC, ".trap_present", (bool)CurrentProgramInfo.TrapHandlerEnable); - // Compute registers - // If the front-end has set tgid_x/y/z_en - assert that the - // CurrentProgramInfo is consistent (usually set with function attributes - // amdgpu-no-workgroup-id-x etc.). - assert(MD->checkComputeRegisters(".tgid_x_en", - (bool)CurrentProgramInfo.TGIdXEnable)); - assert(MD->checkComputeRegisters(".tgid_y_en", - (bool)CurrentProgramInfo.TGIdYEnable)); - assert(MD->checkComputeRegisters(".tgid_z_en", - (bool)CurrentProgramInfo.TGIdZEnable)); - // EXCPEnMSB? const unsigned LdsDwGranularity = 128; MD->setHwStage(CC, ".lds_size", diff --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll index 2b9f639..8060636 100644 --- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll +++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll @@ -157,7 +157,7 @@ declare i64 @llvm.amdgcn.s.getpc() #2 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(write) declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32 immarg) #3 -attributes #0 = { nounwind memory(readwrite) "amdgpu-flat-work-group-size"="1024,1024" "amdgpu-memory-bound"="false" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-unroll-threshold"="700" "amdgpu-wave-limiter"="false" "amdgpu-work-group-info-arg-no"="4" "denormal-fp-math-f32"="preserve-sign" "target-features"=",+wavefrontsize64,+cumode" } +attributes #0 = { nounwind memory(readwrite) "amdgpu-flat-work-group-size"="1024,1024" "amdgpu-memory-bound"="false" "amdgpu-unroll-threshold"="700" "amdgpu-wave-limiter"="false" "amdgpu-work-group-info-arg-no"="4" "denormal-fp-math-f32"="preserve-sign" "target-features"=",+wavefrontsize64,+cumode" } attributes #1 = { nounwind memory(readwrite) "InitialPSInputAddr"="36983" } -- 2.7.4