From 4d39552abea3467829760317e5de56e3d998b1c4 Mon Sep 17 00:00:00 2001
From: Pierre van Houtryve <pierre.vanhoutryve@amd.com>
Date: Tue, 22 Nov 2022 14:14:46 +0000
Subject: [PATCH] [AMDGPU][NFC] Remove isLegalVOP3PShuffleMask

Unused function since D134967

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D138493
---
 llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp | 9 ---------
 llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h   | 1 -
 2 files changed, 10 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
index 0aa2c88a..96ce376 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
@@ -64,15 +64,6 @@ AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg,
   return std::make_pair(Reg, 0);
 }
 
-bool AMDGPU::isLegalVOP3PShuffleMask(ArrayRef<int> Mask) {
-  assert(Mask.size() == 2);
-
-  // If one half is undef, the other is trivially in the same reg.
-  if (Mask[0] == -1 || Mask[1] == -1)
-    return true;
-  return (Mask[0] & 2) == (Mask[1] & 2);
-}
-
 bool AMDGPU::hasAtomicFaddRtnForTy(const GCNSubtarget &Subtarget,
                                    const LLT &Ty) {
   if (Ty == LLT::scalar(32))
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
index 9f7c00b..ff4edf0 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
@@ -27,7 +27,6 @@ std::pair<Register, unsigned>
 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg,
                           GISelKnownBits *KnownBits = nullptr);
 
-bool isLegalVOP3PShuffleMask(ArrayRef<int> Mask);
 bool hasAtomicFaddRtnForTy(const GCNSubtarget &Subtarget, const LLT &Ty);
 }
 }
-- 
2.7.4