From 4cd9a03435bcd20ce6f524e3826fd263951c22fe Mon Sep 17 00:00:00 2001 From: Yifeng Zhao Date: Thu, 10 Dec 2020 08:22:19 +0800 Subject: [PATCH] ARM: dts: rockchip: Add NFC node for RK3036 SoC Add NAND FLASH Controller(NFC) node for RK3036 SoC. Signed-off-by: Yifeng Zhao Link: https://lore.kernel.org/r/20201210002219.5739-4-yifeng.zhao@rock-chips.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036.dtsi | 52 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 0935670..dda5a1f 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -292,6 +292,21 @@ status = "disabled"; }; + nfc: nand-controller@10500000 { + compatible = "rockchip,rk3036-nfc", + "rockchip,rk2928-nfc"; + reg = <0x10500000 0x4000>; + interrupts = ; + clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; + clock-names = "ahb", "nfc"; + assigned-clocks = <&cru SCLK_NANDC>; + assigned-clock-rates = <150000000>; + pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0 + &flash_rdn &flash_rdy &flash_wrn>; + pinctrl-names = "default"; + status = "disabled"; + }; + cru: clock-controller@20000000 { compatible = "rockchip,rk3036-cru"; reg = <0x20000000 0x1000>; @@ -643,6 +658,43 @@ }; }; + nfc { + flash_ale: flash-ale { + rockchip,pins = <2 RK_PA0 1 &pcfg_pull_default>; + }; + + flash_bus8: flash-bus8 { + rockchip,pins = <1 RK_PD0 1 &pcfg_pull_default>, + <1 RK_PD1 1 &pcfg_pull_default>, + <1 RK_PD2 1 &pcfg_pull_default>, + <1 RK_PD3 1 &pcfg_pull_default>, + <1 RK_PD4 1 &pcfg_pull_default>, + <1 RK_PD5 1 &pcfg_pull_default>, + <1 RK_PD6 1 &pcfg_pull_default>, + <1 RK_PD7 1 &pcfg_pull_default>; + }; + + flash_cle: flash-cle { + rockchip,pins = <2 RK_PA1 1 &pcfg_pull_default>; + }; + + flash_csn0: flash-csn0 { + rockchip,pins = <2 RK_PA6 1 &pcfg_pull_default>; + }; + + flash_rdn: flash-rdn { + rockchip,pins = <2 RK_PA3 1 &pcfg_pull_default>; + }; + + flash_rdy: flash-rdy { + rockchip,pins = <2 RK_PA4 1 &pcfg_pull_default>; + }; + + flash_wrn: flash-wrn { + rockchip,pins = <2 RK_PA2 1 &pcfg_pull_default>; + }; + }; + emac { emac_xfer: emac-xfer { rockchip,pins = <2 RK_PB2 1 &pcfg_pull_default>, /* crs_dvalid */ -- 2.7.4