From 4c4e7ad46ed77f552e2624d2f711c0ce51714395 Mon Sep 17 00:00:00 2001 From: Pedro Alves Date: Wed, 27 Jun 2018 17:19:32 +0100 Subject: [PATCH] Fix Cell debugging regression Commit 00431a78b28f ("Use thread_info and inferior pointers more throughout") broke Cell multi-arch debugging, because it made the proc-service routines (ps_lgetregs etc.) access registers using the SPU architecture if GDB happens to interrupt SPU code. The proc-service routines must always operate on the "main" (in this case PowerPC) architecture, because that's the register set libthread_db expects to be using. Restore the previous behavior, but wrapped in a new get_ps_regcache function with a describing comment. Also, the ps_l*regs routines have an explicit lwpid parameter that said commit missed; with the commit mentioned above, we started always reading the registers off of the current thread, which is incorrect. That is fixed by this commit too. gdb/ChangeLog: 2018-06-27 Pedro Alves * proc-service.c (get_ps_regcache): New. (ps_lgetregs, ps_lsetregs, ps_lgetfpregs) (ps_lsetfpregs): Use it. --- gdb/ChangeLog | 6 ++++++ gdb/proc-service.c | 23 +++++++++++++++++++---- 2 files changed, 25 insertions(+), 4 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index a3882f5..c791add 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,9 @@ +2018-06-27 Pedro Alves + + * proc-service.c (get_ps_regcache): New. + (ps_lgetregs, ps_lsetregs, ps_lgetfpregs) + (ps_lsetfpregs): Use it. + 2018-06-27 Omair Javaid PR gdb/21695 diff --git a/gdb/proc-service.c b/gdb/proc-service.c index 04867d2..393cd90 100644 --- a/gdb/proc-service.c +++ b/gdb/proc-service.c @@ -126,13 +126,28 @@ ps_pdwrite (struct ps_prochandle *ph, psaddr_t addr, return ps_xfer_memory (ph, addr, (gdb_byte *) buf, size, 1); } +/* Get a regcache for LWPID using its inferior's "main" architecture, + which is the register set libthread_db expects to be using. In + multi-arch debugging scenarios, the thread's architecture may + differ from the inferior's "main" architecture. E.g., in the Cell + combined debugger, if GDB happens to interrupt SPU code, the + thread's architecture is SPU, and the main architecture is + PowerPC. */ + +static struct regcache * +get_ps_regcache (struct ps_prochandle *ph, lwpid_t lwpid) +{ + inferior *inf = ph->thread->inf; + return get_thread_arch_regcache (ptid_t (inf->pid, lwpid), inf->gdbarch); +} + /* Get the general registers of LWP LWPID within the target process PH and store them in GREGSET. */ ps_err_e ps_lgetregs (struct ps_prochandle *ph, lwpid_t lwpid, prgregset_t gregset) { - struct regcache *regcache = get_thread_regcache (ph->thread); + struct regcache *regcache = get_ps_regcache (ph, lwpid); target_fetch_registers (regcache, -1); fill_gregset (regcache, (gdb_gregset_t *) gregset, -1); @@ -146,7 +161,7 @@ ps_lgetregs (struct ps_prochandle *ph, lwpid_t lwpid, prgregset_t gregset) ps_err_e ps_lsetregs (struct ps_prochandle *ph, lwpid_t lwpid, const prgregset_t gregset) { - struct regcache *regcache = get_thread_regcache (ph->thread); + struct regcache *regcache = get_ps_regcache (ph, lwpid); supply_gregset (regcache, (const gdb_gregset_t *) gregset); target_store_registers (regcache, -1); @@ -160,7 +175,7 @@ ps_lsetregs (struct ps_prochandle *ph, lwpid_t lwpid, const prgregset_t gregset) ps_err_e ps_lgetfpregs (struct ps_prochandle *ph, lwpid_t lwpid, gdb_prfpregset_t *fpregset) { - struct regcache *regcache = get_thread_regcache (ph->thread); + struct regcache *regcache = get_ps_regcache (ph, lwpid); target_fetch_registers (regcache, -1); fill_fpregset (regcache, (gdb_fpregset_t *) fpregset, -1); @@ -175,7 +190,7 @@ ps_err_e ps_lsetfpregs (struct ps_prochandle *ph, lwpid_t lwpid, const gdb_prfpregset_t *fpregset) { - struct regcache *regcache = get_thread_regcache (ph->thread); + struct regcache *regcache = get_ps_regcache (ph, lwpid); supply_fpregset (regcache, (const gdb_fpregset_t *) fpregset); target_store_registers (regcache, -1); -- 2.7.4