From 4bb2e4770599615dba4c3710031910dfac20163e Mon Sep 17 00:00:00 2001 From: "shengyang.chen" Date: Wed, 31 Aug 2022 16:14:50 +0800 Subject: [PATCH] riscv:dts:drm replace dts compatible value for vout Signed-off-by: shengyang.chen --- arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 4 ++-- .../boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts | 4 ++-- .../boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts | 4 ++-- arch/riscv/boot/dts/starfive/jh7110.dtsi | 20 ++++++++++---------- 4 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi index 8de5586..e2d9f63 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -655,7 +655,7 @@ }; }; -&hdmi_output { +&rgb_output { status = "okay"; ports { @@ -685,7 +685,7 @@ status = "disabled"; }; -&encoder { +&dsi_output { status = "okay"; ports { diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts index f6d3ee2..ab3eee1 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts @@ -17,7 +17,7 @@ pinctrl-0 = <&dvp_pins>; }; -&hdmi_output { +&rgb_output { status = "okay"; }; @@ -25,7 +25,7 @@ status = "okay"; }; -&encoder { +&dsi_output { status = "disabled"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts index f6d67f5..3580cd0 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts @@ -39,7 +39,7 @@ status = "okay"; }; -&hdmi_output { +&rgb_output { status = "okay"; }; @@ -47,7 +47,7 @@ status = "okay"; }; -&encoder { +&dsi_output { status = "disabled"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index fc25056..5b71fb9 100755 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -1598,13 +1598,13 @@ }; display: display-subsystem { - compatible = "verisilicon,display-subsystem"; + compatible = "starfive,jh7110-display","verisilicon,display-subsystem"; ports = <&dc_out_dpi0>; status = "disabled"; }; dssctrl: dssctrl@295B0000 { - compatible = "verisilicon,dss-ctrl", "syscon"; + compatible = "starfive,jh7110-dssctrl","verisilicon,dss-ctrl", "syscon"; reg = <0 0x295B0000 0 0x90>; }; @@ -1613,8 +1613,8 @@ status = "disabled"; }; - hdmi_output: hdmi-output { - compatible = "verisilicon,hdmi-encoder"; + rgb_output: rgb-output { + compatible = "starfive,jh7110-rgb_output","verisilicon,rgb-encoder"; //verisilicon,dss-syscon = <&dssctrl>; //verisilicon,mux-mask = <0x70 0x380>; //verisilicon,mux-val = <0x40 0x280>; @@ -1622,7 +1622,7 @@ }; dc8200: dc8200@29400000 { - compatible = "verisilicon,dc8200"; + compatible = "starfive,jh7110-dc8200","verisilicon,dc8200"; verisilicon,dss-syscon = <&dssctrl>;//20220624 panel syscon reg = <0x0 0x29400000 0x0 0x100>, <0x0 0x29400800 0x0 0x2000>, @@ -1676,13 +1676,13 @@ power-domains = <&pwrc JH7110_PD_VOUT>; }; - encoder: display-encoder { - compatible = "verisilicon,dsi-encoder"; + dsi_output: dsi-output { + compatible = "starfive,jh7110-display-encoder","verisilicon,dsi-encoder"; status = "disabled"; }; mipi_dphy: mipi-dphy@295e0000{ - compatible = "starfive,jh7100-mipi-dphy-tx"; + compatible = "starfive,jh7110-mipi-dphy-tx","m31,mipi-dphy-tx"; reg = <0x0 0x295e0000 0x0 0x10000>; clocks = <&clkvout JH7110_U0_MIPITX_DPHY_CLK_TXESC>; clock-names = "dphy_txesc"; @@ -1694,7 +1694,7 @@ }; mipi_dsi: mipi@295d0000 { - compatible = "cdns,dsi"; + compatible = "starfive,jh7100-mipi_dsi","cdns,dsi"; reg = <0x0 0x295d0000 0x0 0x10000>; interrupts = <98>; reg-names = "dsi"; @@ -1731,7 +1731,7 @@ }; hdmi: hdmi@29590000 { - compatible = "rockchip,rk3036-inno-hdmi"; + compatible = "starfive,jh7100-hdmi","inno,hdmi"; reg = <0x0 0x29590000 0x0 0x4000>; interrupts = <99>; /*interrupts = ;*/ -- 2.7.4