From 4b1a1d981869346f5b98f78fa1f31acb58535932 Mon Sep 17 00:00:00 2001 From: Dragan Mladjenovic Date: Tue, 9 Jul 2019 21:20:57 +0000 Subject: [PATCH] cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal for both call instructions. 2019-07-09 Dragan Mladjenovic * cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal for both call instructions. 2019-07-09 Dragan Mladjenovic * gcc.target/mips/cfgcleanup-jalr1.c: New test. * gcc.target/mips/cfgcleanup-jalr2.c: New test. * gcc.target/mips/cfgcleanup-jalr3.c: New test. From-SVN: r273314 --- gcc/ChangeLog | 5 +++++ gcc/cfgcleanup.c | 9 +++++++++ gcc/testsuite/ChangeLog | 6 ++++++ gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c | 19 +++++++++++++++++++ gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c | 23 +++++++++++++++++++++++ gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c | 23 +++++++++++++++++++++++ 6 files changed, 85 insertions(+) create mode 100644 gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c create mode 100644 gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c create mode 100644 gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2061c1b..71569bf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-07-09 Dragan Mladjenovic + + * cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal + for both call instructions. + 2019-07-09 John Darrington * simplify-rtx.c (simplify_unary_operation_1): Use GET_MODE_PRECISION diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c index 992912c..fca3a08 100644 --- a/gcc/cfgcleanup.c +++ b/gcc/cfgcleanup.c @@ -53,6 +53,7 @@ along with GCC; see the file COPYING3. If not see #include "dce.h" #include "dbgcnt.h" #include "rtl-iter.h" +#include "regs.h" #define FORWARDER_BLOCK_P(BB) ((BB)->flags & BB_FORWARDER_BLOCK) @@ -1224,6 +1225,14 @@ old_insns_match_p (int mode ATTRIBUTE_UNUSED, rtx_insn *i1, rtx_insn *i2) } } } + + HARD_REG_SET i1_used, i2_used; + + get_call_reg_set_usage (i1, &i1_used, call_used_reg_set); + get_call_reg_set_usage (i2, &i2_used, call_used_reg_set); + + if (!hard_reg_set_equal_p (i1_used, i2_used)) + return dir_none; } /* If both i1 and i2 are frame related, verify all the CFA notes diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 31e8a83..bf7c992 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2019-07-09 Dragan Mladjenovic + + * gcc.target/mips/cfgcleanup-jalr1.c: New test. + * gcc.target/mips/cfgcleanup-jalr2.c: New test. + * gcc.target/mips/cfgcleanup-jalr3.c: New test. + 2019-07-09 Richard Biener PR tree-optimization/91114 diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c new file mode 100644 index 0000000..24c1826 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */ +/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */ + +extern void foo (void*); + +extern void bar (void*); + +void +test (void* p) +{ + if (!p) + foo(p); + else + bar(p); +} + +/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */ +/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */ diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c new file mode 100644 index 0000000..9fd75c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */ +/* { dg-additional-options "-fno-inline -fipa-ra -mcompact-branches=never" } */ +/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */ + +static int foo (void* p) { __asm__ (""::"r"(p):"$t0"); return 0; } + +static int bar (void* p) { return 1; } + +int +test (void* p) +{ + int res = !p ? foo(p) : bar(p); + + register int tmp __asm__("$t0") = -1; + __asm__ (""::"r"(tmp)); + + return res; +} + +/* { dg-final { scan-assembler "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */ +/* { dg-final { scan-assembler "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */ +/* { dg-final { scan-assembler-not "\\.set\tnomacro\n\tjalr\t\\\$25" } } */ diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c new file mode 100644 index 0000000..580c6ec --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */ +/* { dg-additional-options "-fno-inline -fipa-ra -mcompact-branches=never" } */ +/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */ + +static int foo (void* p) { return 0; } + +static int bar (void* p) { return 1; } + +int +test (void* p) +{ + int res = !p ? foo(p) : bar(p); + + register int tmp __asm__("$t0") = -1; + __asm__ (""::"r"(tmp)); + + return res; +} + +/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */ +/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */ +/* { dg-final { scan-assembler "\\.set\tnomacro\n\tjalr\t\\\$25" } } */ -- 2.7.4