From 4a89089a10804fc9c5e78e88fd033dbac96619e6 Mon Sep 17 00:00:00 2001 From: Donghwa Lee Date: Fri, 27 Aug 2010 15:03:39 +0900 Subject: [PATCH] s5pc210: universal: gating clocks for DSIM0, MDNIE0 and MIE0 --- board/samsung/universal_c210/lowlevel_init.S | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S index fd4a643..86b9f57 100644 --- a/board/samsung/universal_c210/lowlevel_init.S +++ b/board/samsung/universal_c210/lowlevel_init.S @@ -288,6 +288,11 @@ system_clock_init: ldr r2, =0x0C55C @ CLK_DIV_PERIL3 str r1, [r0, r2] + /* DSIM0[3]: 0, MDNIE0[2]: 0, MIE0[1]: 0 */ + ldr r1, =0xFFFFFFF1 + ldr r2, =0x0C934 @ CLK_GATE_IP_LCD0 + str r1, [r0, r2] + /* LCD1[5]: 0, G3D[3]: 0 */ ldr r1, =0xFFFFFFD7 ldr r2, =0x0C970 @ CLK_GATE_BLOCK -- 2.7.4