From 494a381ede7db97ebfc7b7fff6c369a83669ad8f Mon Sep 17 00:00:00 2001
From: Rafael Espindola <rafael.espindola@gmail.com>
Date: Fri, 17 Jul 2015 00:57:52 +0000
Subject: [PATCH] Use small encodings for constants when possible.

llvm-svn: 242493
---
 llvm/lib/Target/X86/X86InstrCompiler.td |  6 ++---
 llvm/test/CodeGen/X86/and-encoding.ll   | 41 +++++++++++++++++++++++++++++++++
 llvm/test/CodeGen/X86/pr21529.ll        | 15 ------------
 3 files changed, 44 insertions(+), 18 deletions(-)
 create mode 100644 llvm/test/CodeGen/X86/and-encoding.ll
 delete mode 100644 llvm/test/CodeGen/X86/pr21529.ll

diff --git a/llvm/lib/Target/X86/X86InstrCompiler.td b/llvm/lib/Target/X86/X86InstrCompiler.td
index 7f850d6..49dc318 100644
--- a/llvm/lib/Target/X86/X86InstrCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrCompiler.td
@@ -1077,11 +1077,11 @@ defm : CMOVmr<X86_COND_NO, CMOVO16rm , CMOVO32rm , CMOVO64rm>;
 
 // zextload bool -> zextload byte
 def : Pat<(zextloadi8i1  addr:$src), (AND8ri (MOV8rm addr:$src), (i8 1))>;
-def : Pat<(zextloadi16i1 addr:$src), (AND16ri (MOVZX16rm8 addr:$src), (i16 1))>;
-def : Pat<(zextloadi32i1 addr:$src), (AND32ri (MOVZX32rm8 addr:$src), (i32 1))>;
+def : Pat<(zextloadi16i1 addr:$src), (AND16ri8 (MOVZX16rm8 addr:$src), (i16 1))>;
+def : Pat<(zextloadi32i1 addr:$src), (AND32ri8 (MOVZX32rm8 addr:$src), (i32 1))>;
 def : Pat<(zextloadi64i1 addr:$src),
           (SUBREG_TO_REG (i64 0),
-           (AND32ri (MOVZX32rm8 addr:$src), (i32 1)), sub_32bit)>;
+           (AND32ri8 (MOVZX32rm8 addr:$src), (i32 1)), sub_32bit)>;
 
 // extload bool -> extload byte
 // When extloading from 16-bit and smaller memory locations into 64-bit
diff --git a/llvm/test/CodeGen/X86/and-encoding.ll b/llvm/test/CodeGen/X86/and-encoding.ll
new file mode 100644
index 0000000..f7bbac2
--- /dev/null
+++ b/llvm/test/CodeGen/X86/and-encoding.ll
@@ -0,0 +1,41 @@
+; RUN: llc -show-mc-encoding < %s | FileCheck %s
+
+; Test that the direct object emission selects the and variant with 8 bit
+; immediate.
+; We used to get this wrong when using direct object emission, but not when
+; reading assembly.
+
+
+target triple = "x86_64-pc-linux"
+
+define void @f1() {
+; CHECK-LABEL: f1:
+; CHECK: andq    $-32, %rsp              # encoding: [0x48,0x83,0xe4,0xe0]
+  %foo = alloca i8, align 32
+  ret void
+}
+
+define void @f2(i1 *%x, i16 *%y) {
+; CHECK-LABEL: f2:
+; CHECK: andl	$1, %eax                # encoding: [0x83,0xe0,0x01]
+  %a = load i1, i1* %x
+  %b = zext i1 %a to i16
+  store i16 %b, i16* %y
+  ret void
+}
+
+define i32 @f3(i1 *%x) {
+; CHECK-LABEL: f3:
+; CHECK: andl	$1, %eax                # encoding: [0x83,0xe0,0x01]
+  %a = load i1, i1* %x
+  %b = zext i1 %a to i32
+  ret i32 %b
+}
+
+define i64 @f4(i1 *%x) {
+; CHECK-LABEL: f4:
+; CHECK: andl	$1, %eax                # encoding: [0x83,0xe0,0x01]
+  %a = load i1, i1* %x
+  %b = zext i1 %a to i64
+  ret i64 %b
+}
diff --git a/llvm/test/CodeGen/X86/pr21529.ll b/llvm/test/CodeGen/X86/pr21529.ll
deleted file mode 100644
index 655bc84..0000000
--- a/llvm/test/CodeGen/X86/pr21529.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; RUN: llc -show-mc-encoding < %s | FileCheck %s
-
-; Test that the direct object emission selects the and variant with 8 bit
-; immediate.
-; We used to get this wrong when using direct object emission, but not when
-; reading assembly.
-
-; CHECK: andq    $-32, %rsp              # encoding: [0x48,0x83,0xe4,0xe0]
-
-target triple = "x86_64-pc-linux"
-
-define void @f() {
-  %foo = alloca i8, align 32
-  ret void
-}
-- 
2.7.4