From 490fc573a6eb8c2b5e8ee43ac4fdd1ab6cc81abb Mon Sep 17 00:00:00 2001
From: Carol Eidt <carol.eidt@microsoft.com>
Date: Thu, 26 Jul 2018 13:44:47 -0700
Subject: [PATCH] Include long shifts in OperIsShiftOrRotate

The register allocator uses `OperIsShiftOrRotate` as the assertion for the method that gets the kills for the class of instructions that use RCX as the shift amount register. Expand it to include `RSH_LO` and `LSH_HI`.

Fix dotnet/coreclr#19081


Commit migrated from https://github.com/dotnet/coreclr/commit/8f020204f27aa10f778f9e549e01c6717d939d47
---
 src/coreclr/src/jit/codegenxarch.cpp |  2 +-
 src/coreclr/src/jit/gentree.h        | 16 +++++++++++++++-
 src/coreclr/src/jit/lowerarmarch.cpp |  5 ++---
 src/coreclr/src/jit/lowerxarch.cpp   |  7 ++-----
 4 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/src/coreclr/src/jit/codegenxarch.cpp b/src/coreclr/src/jit/codegenxarch.cpp
index 1ceb928..ea37fb6 100644
--- a/src/coreclr/src/jit/codegenxarch.cpp
+++ b/src/coreclr/src/jit/codegenxarch.cpp
@@ -4131,7 +4131,7 @@ void CodeGen::genCodeForShiftRMW(GenTreeStoreInd* storeInd)
     GenTree* data = storeInd->Data();
     GenTree* addr = storeInd->Addr();
 
-    assert(data->OperIsShiftOrRotate());
+    assert(data->OperIsShift() || data->OperIsRotate());
 
     // This function only handles the RMW case.
     assert(data->gtOp.gtOp1->isUsedFromMemory());
diff --git a/src/coreclr/src/jit/gentree.h b/src/coreclr/src/jit/gentree.h
index 83f07d3..4195bf4 100644
--- a/src/coreclr/src/jit/gentree.h
+++ b/src/coreclr/src/jit/gentree.h
@@ -1281,6 +1281,20 @@ public:
         return OperIsShift(OperGet());
     }
 
+    static bool OperIsShiftLong(genTreeOps gtOper)
+    {
+#ifdef _TARGET_64BIT_
+        return false;
+#else
+        return (gtOper == GT_LSH_HI) || (gtOper == GT_RSH_LO);
+#endif
+    }
+
+    bool OperIsShiftLong() const
+    {
+        return OperIsShiftLong(OperGet());
+    }
+
     static bool OperIsRotate(genTreeOps gtOper)
     {
         return (gtOper == GT_ROL) || (gtOper == GT_ROR);
@@ -1293,7 +1307,7 @@ public:
 
     static bool OperIsShiftOrRotate(genTreeOps gtOper)
     {
-        return OperIsShift(gtOper) || OperIsRotate(gtOper);
+        return OperIsShift(gtOper) || OperIsRotate(gtOper) || OperIsShiftLong(gtOper);
     }
 
     bool OperIsShiftOrRotate() const
diff --git a/src/coreclr/src/jit/lowerarmarch.cpp b/src/coreclr/src/jit/lowerarmarch.cpp
index c46809f..f4e3bfc9 100644
--- a/src/coreclr/src/jit/lowerarmarch.cpp
+++ b/src/coreclr/src/jit/lowerarmarch.cpp
@@ -694,6 +694,7 @@ void Lowering::ContainCheckMul(GenTreeOp* node)
 void Lowering::ContainCheckShiftRotate(GenTreeOp* node)
 {
     GenTree* shiftBy = node->gtOp2;
+    assert(node->OperIsShiftOrRotate());
 
 #ifdef _TARGET_ARM_
     GenTree* source = node->gtOp1;
@@ -702,9 +703,7 @@ void Lowering::ContainCheckShiftRotate(GenTreeOp* node)
         assert(source->OperGet() == GT_LONG);
         MakeSrcContained(node, source);
     }
-#else  // !_TARGET_ARM_
-    assert(node->OperIsShiftOrRotate());
-#endif // !_TARGET_ARM_
+#endif // _TARGET_ARM_
 
     if (shiftBy->IsCnsIntOrI())
     {
diff --git a/src/coreclr/src/jit/lowerxarch.cpp b/src/coreclr/src/jit/lowerxarch.cpp
index 327eb2b..6aa2951 100644
--- a/src/coreclr/src/jit/lowerxarch.cpp
+++ b/src/coreclr/src/jit/lowerxarch.cpp
@@ -1693,18 +1693,15 @@ void Lowering::ContainCheckMul(GenTreeOp* node)
 //
 void Lowering::ContainCheckShiftRotate(GenTreeOp* node)
 {
+    assert(node->OperIsShiftOrRotate());
 #ifdef _TARGET_X86_
     GenTree* source = node->gtOp1;
-    if (node->OperIs(GT_LSH_HI, GT_RSH_LO))
+    if (node->OperIsShiftLong())
     {
         assert(source->OperGet() == GT_LONG);
         MakeSrcContained(node, source);
     }
-    else
 #endif // !_TARGET_X86_
-    {
-        assert(node->OperIsShiftOrRotate());
-    }
 
     GenTree* shiftBy = node->gtOp2;
     if (IsContainableImmed(node, shiftBy) && (shiftBy->gtIntConCommon.IconValue() <= 255) &&
-- 
2.7.4