From 48973d21e13ca0497205c9950c78009ad7645188 Mon Sep 17 00:00:00 2001 From: Sagar Thakur Date: Fri, 1 Apr 2016 11:55:33 +0000 Subject: [PATCH] [MIPS][LLVM-MC] Fix JR encoding for MIPSR6 ISA Summary: The assembler was picking the wrong JR variant because the pre-R6 one was still enabled at R6. Author: nitesh.jain Reviewers: vkalintiris, dsanders Subscribers: dsanders, llvm-commits, mohit.bhakkad, sagar, bhushan, jaydeep Differential: D18387 llvm-svn: 265134 --- llvm/lib/Target/Mips/MipsInstrInfo.td | 2 +- llvm/test/MC/Mips/mips32r6/valid.s | 2 ++ llvm/test/MC/Mips/mips64r6/valid.s | 2 ++ 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index b6b6eae..37aa4ce 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -1809,7 +1809,7 @@ def SC : SCBase<"sc", GPR32Opnd>, LW_FM<0x38>, ISA_MIPS2_NOT_32R6_64R6; /// Jump and Branch Instructions def J : MMRel, JumpFJ, FJ<2>, AdditionalRequires<[RelocStatic]>, IsBranch; -def JR : MMRel, IndirectBranch<"jr", GPR32Opnd>, MTLO_FM<8>; +def JR : MMRel, IndirectBranch<"jr", GPR32Opnd>, MTLO_FM<8>, ISA_MIPS1_NOT_32R6_64R6; def BEQ : MMRel, CBranch<"beq", brtarget, seteq, GPR32Opnd>, BEQ_FM<4>; def BEQL : MMRel, CBranch<"beql", brtarget, seteq, GPR32Opnd, 0>, BEQ_FM<20>, ISA_MIPS2_NOT_32R6_64R6; diff --git a/llvm/test/MC/Mips/mips32r6/valid.s b/llvm/test/MC/Mips/mips32r6/valid.s index ad96a3f..0cc8d4d 100644 --- a/llvm/test/MC/Mips/mips32r6/valid.s +++ b/llvm/test/MC/Mips/mips32r6/valid.s @@ -161,6 +161,8 @@ a: j 1328 # CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c] jal 21100 # CHECK: jal 21100 # encoding: [0x0c,0x00,0x14,0x9b] jr.hb $4 # CHECK: jr.hb $4 # encoding: [0x00,0x80,0x04,0x09] + jr $ra # CHECK: jr $ra # encoding: [0x03,0xe0,0x00,0x09] + jr $25 # CHECK: jr $25 # encoding: [0x03,0x20,0x00,0x09] jalr.hb $4 # CHECK: jalr.hb $4 # encoding: [0x00,0x80,0xfc,0x09] jalr.hb $4, $5 # CHECK: jalr.hb $4, $5 # encoding: [0x00,0xa0,0x24,0x09] ldc2 $8, -701($at) # CHECK: ldc2 $8, -701($1) # encoding: [0x49,0xc8,0x0d,0x43] diff --git a/llvm/test/MC/Mips/mips64r6/valid.s b/llvm/test/MC/Mips/mips64r6/valid.s index 5bdd342..f70354f 100644 --- a/llvm/test/MC/Mips/mips64r6/valid.s +++ b/llvm/test/MC/Mips/mips64r6/valid.s @@ -140,6 +140,8 @@ a: j 1328 # CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c] jal 21100 # CHECK: jal 21100 # encoding: [0x0c,0x00,0x14,0x9b] jr.hb $4 # CHECK: jr.hb $4 # encoding: [0x00,0x80,0x04,0x09] + jr $ra # CHECK: jr $ra # encoding: [0x03,0xe0,0x00,0x09] + jr $25 # CHECK: jr $25 # encoding: [0x03,0x20,0x00,0x09] jalr.hb $4 # CHECK: jalr.hb $4 # encoding: [0x00,0x80,0xfc,0x09] jalr.hb $4, $5 # CHECK: jalr.hb $4, $5 # encoding: [0x00,0xa0,0x24,0x09] jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0xf8,0x05,0x01,0x00] -- 2.7.4