From 488dd0758366213ab85701d7e687458cfa598c49 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Fri, 16 Dec 2022 02:38:01 +0200 Subject: [PATCH] drm/i915/dsb: Fix DSB command buffer size checks MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit free_pos is in dwords, DSB_BUF_SIZE in bytes. Directly comparing the two is nonsense. Fix it up, and make sure we also account for the 8byte alignment requirement for each instruction, and also assume that each instruction normally eats two dwords. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20221216003810.13338-5-ville.syrjala@linux.intel.com Reviewed-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_dsb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index 6abfd0f..fbcbf9e 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -97,7 +97,7 @@ void intel_dsb_indexed_reg_write(struct intel_dsb *dsb, u32 *buf = dsb->cmd_buf; u32 reg_val; - if (drm_WARN_ON(&dev_priv->drm, dsb->free_pos >= DSB_BUF_SIZE)) { + if (drm_WARN_ON(&dev_priv->drm, ALIGN(dsb->free_pos, 2) > DSB_BUF_SIZE / 4 - 2)) { drm_dbg_kms(&dev_priv->drm, "DSB buffer overflow\n"); return; } @@ -167,7 +167,7 @@ void intel_dsb_reg_write(struct intel_dsb *dsb, struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 *buf = dsb->cmd_buf; - if (drm_WARN_ON(&dev_priv->drm, dsb->free_pos >= DSB_BUF_SIZE)) { + if (drm_WARN_ON(&dev_priv->drm, ALIGN(dsb->free_pos, 2) > DSB_BUF_SIZE / 4 - 2)) { drm_dbg_kms(&dev_priv->drm, "DSB buffer overflow\n"); return; } -- 2.7.4