From 4880853fb65c0270afc50467ebaaa9dafd25fa9d Mon Sep 17 00:00:00 2001 From: Kai Luo Date: Thu, 11 Jun 2020 11:45:33 +0800 Subject: [PATCH] Revert "[PowerPC][NFC] Testing ROTL of v1i128." This reverts commit c79ab63e839b2621405f4472c46f88bfc7a30257 which is committed by accident. --- pr45628_tests.diff | 1007 ---------------------------------------------------- 1 file changed, 1007 deletions(-) delete mode 100644 pr45628_tests.diff diff --git a/pr45628_tests.diff b/pr45628_tests.diff deleted file mode 100644 index be7c2f2..0000000 --- a/pr45628_tests.diff +++ /dev/null @@ -1,1007 +0,0 @@ -diff --git a/llvm/test/CodeGen/PowerPC/pr45628.ll b/llvm/test/CodeGen/PowerPC/pr45628.ll -index 5b3b16a3d15..b876cf7e1f5 100644 ---- a/llvm/test/CodeGen/PowerPC/pr45628.ll -+++ b/llvm/test/CodeGen/PowerPC/pr45628.ll -@@ -1,385 +1,712 @@ - ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py - ; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ - ; RUN: -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s \ --; RUN: -check-prefix=CHECK-VSX -+; RUN: -check-prefix=P9-VSX - ; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ - ; RUN: -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs -mattr=-vsx < %s | FileCheck %s \ --; RUN: -check-prefix=CHECK-NOVSX -+; RUN: -check-prefix=P9-NOVSX -+; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ -+; RUN: -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s \ -+; RUN: -check-prefix=P8-VSX -+; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ -+; RUN: -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs -mattr=-vsx < %s | FileCheck %s \ -+; RUN: -check-prefix=P8-NOVSX - - define <1 x i128> @rotl_64(<1 x i128> %num) { --; CHECK-VSX-LABEL: rotl_64: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI0_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI0_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v5, v3, 15 --; CHECK-VSX-NEXT: vsro v2, v2, v3 --; CHECK-VSX-NEXT: vsl v4, v4, v5 --; CHECK-VSX-NEXT: vsr v2, v2, v5 --; CHECK-VSX-NEXT: xxlor v2, v4, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: rotl_64: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI0_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI0_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v5, v3, 15 -+; P9-VSX-NEXT: vsro v2, v2, v3 -+; P9-VSX-NEXT: vsl v4, v4, v5 -+; P9-VSX-NEXT: vsr v2, v2, v5 -+; P9-VSX-NEXT: xxlor v2, v4, v2 -+; P9-VSX-NEXT: blr -+; -+; P9-NOVSX-LABEL: rotl_64: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI0_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI0_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v5, v3, 15 -+; P9-NOVSX-NEXT: vsro v2, v2, v3 -+; P9-NOVSX-NEXT: vsl v4, v4, v5 -+; P9-NOVSX-NEXT: vsr v2, v2, v5 -+; P9-NOVSX-NEXT: vor v2, v4, v2 -+; P9-NOVSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: rotl_64: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI0_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI0_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v5, v3, 15 --; CHECK-NOVSX-NEXT: vsro v2, v2, v3 --; CHECK-NOVSX-NEXT: vsl v4, v4, v5 --; CHECK-NOVSX-NEXT: vsr v2, v2, v5 --; CHECK-NOVSX-NEXT: vor v2, v4, v2 --; CHECK-NOVSX-NEXT: blr -+; P8-VSX-LABEL: rotl_64: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxspltd v3, v2, 1 -+; P8-VSX-NEXT: xxswapd v2, v2 -+; P8-VSX-NEXT: xxlxor vs0, vs0, vs0 -+; P8-VSX-NEXT: xxpermdi v3, v3, vs0, 1 -+; P8-VSX-NEXT: xxpermdi v2, vs0, v2, 1 -+; P8-VSX-NEXT: xxlor v2, v3, v2 -+; P8-VSX-NEXT: blr -+; -+; P8-NOVSX-LABEL: rotl_64: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI0_0@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI0_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: vslo v4, v2, v3 -+; P8-NOVSX-NEXT: vsro v2, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsl v4, v4, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v3 -+; P8-NOVSX-NEXT: vor v2, v4, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @rotl_32(<1 x i128> %num) { --; CHECK-VSX-LABEL: rotl_32: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI1_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI1_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: addis r3, r2, .LCPI1_1@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI1_1@toc@l --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v3, v3, 15 --; CHECK-VSX-NEXT: vsl v3, v4, v3 --; CHECK-VSX-NEXT: lxvx v4, 0, r3 --; CHECK-VSX-NEXT: vsro v2, v2, v4 --; CHECK-VSX-NEXT: vspltb v4, v4, 15 --; CHECK-VSX-NEXT: vsr v2, v2, v4 --; CHECK-VSX-NEXT: xxlor v2, v3, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: rotl_32: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI1_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI1_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: addis r3, r2, .LCPI1_1@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI1_1@toc@l -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v3, v3, 15 -+; P9-VSX-NEXT: vsl v3, v4, v3 -+; P9-VSX-NEXT: lxvx v4, 0, r3 -+; P9-VSX-NEXT: vsro v2, v2, v4 -+; P9-VSX-NEXT: vspltb v4, v4, 15 -+; P9-VSX-NEXT: vsr v2, v2, v4 -+; P9-VSX-NEXT: xxlor v2, v3, v2 -+; P9-VSX-NEXT: blr -+; -+; P9-NOVSX-LABEL: rotl_32: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI1_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI1_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI1_1@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI1_1@toc@l -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v3, v3, 15 -+; P9-NOVSX-NEXT: vsl v3, v4, v3 -+; P9-NOVSX-NEXT: lvx v4, 0, r3 -+; P9-NOVSX-NEXT: vsro v2, v2, v4 -+; P9-NOVSX-NEXT: vspltb v4, v4, 15 -+; P9-NOVSX-NEXT: vsr v2, v2, v4 -+; P9-NOVSX-NEXT: vor v2, v3, v2 -+; P9-NOVSX-NEXT: blr -+; -+; P8-VSX-LABEL: rotl_32: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd vs0, v2 -+; P8-VSX-NEXT: li r3, 0 -+; P8-VSX-NEXT: mfvsrd r5, v2 -+; P8-VSX-NEXT: mffprd r4, f0 -+; P8-VSX-NEXT: mtfprd f0, r3 -+; P8-VSX-NEXT: rotldi r3, r4, 32 -+; P8-VSX-NEXT: sldi r4, r4, 32 -+; P8-VSX-NEXT: rldimi r3, r5, 32, 0 -+; P8-VSX-NEXT: mtfprd f1, r4 -+; P8-VSX-NEXT: rldicl r4, r5, 32, 32 -+; P8-VSX-NEXT: mtfprd f2, r3 -+; P8-VSX-NEXT: mtfprd f3, r4 -+; P8-VSX-NEXT: xxmrghd v2, vs2, vs1 -+; P8-VSX-NEXT: xxmrghd v3, vs0, vs3 -+; P8-VSX-NEXT: xxlor v2, v2, v3 -+; P8-VSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: rotl_32: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI1_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI1_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI1_1@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI1_1@toc@l --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v3, v3, 15 --; CHECK-NOVSX-NEXT: vsl v3, v4, v3 --; CHECK-NOVSX-NEXT: lvx v4, 0, r3 --; CHECK-NOVSX-NEXT: vsro v2, v2, v4 --; CHECK-NOVSX-NEXT: vspltb v4, v4, 15 --; CHECK-NOVSX-NEXT: vsr v2, v2, v4 --; CHECK-NOVSX-NEXT: vor v2, v3, v2 --; CHECK-NOVSX-NEXT: blr -+; P8-NOVSX-LABEL: rotl_32: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI1_0@toc@ha -+; P8-NOVSX-NEXT: addis r4, r2, .LCPI1_1@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI1_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: addi r3, r4, .LCPI1_1@toc@l -+; P8-NOVSX-NEXT: lvx v4, 0, r3 -+; P8-NOVSX-NEXT: vslo v5, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsro v2, v2, v4 -+; P8-NOVSX-NEXT: vspltb v4, v4, 15 -+; P8-NOVSX-NEXT: vsl v3, v5, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v4 -+; P8-NOVSX-NEXT: vor v2, v3, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @rotl_96(<1 x i128> %num) { --; CHECK-VSX-LABEL: rotl_96: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI2_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI2_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: addis r3, r2, .LCPI2_1@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI2_1@toc@l --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v3, v3, 15 --; CHECK-VSX-NEXT: vsl v3, v4, v3 --; CHECK-VSX-NEXT: lxvx v4, 0, r3 --; CHECK-VSX-NEXT: vsro v2, v2, v4 --; CHECK-VSX-NEXT: vspltb v4, v4, 15 --; CHECK-VSX-NEXT: vsr v2, v2, v4 --; CHECK-VSX-NEXT: xxlor v2, v3, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: rotl_96: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI2_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI2_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: addis r3, r2, .LCPI2_1@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI2_1@toc@l -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v3, v3, 15 -+; P9-VSX-NEXT: vsl v3, v4, v3 -+; P9-VSX-NEXT: lxvx v4, 0, r3 -+; P9-VSX-NEXT: vsro v2, v2, v4 -+; P9-VSX-NEXT: vspltb v4, v4, 15 -+; P9-VSX-NEXT: vsr v2, v2, v4 -+; P9-VSX-NEXT: xxlor v2, v3, v2 -+; P9-VSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: rotl_96: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI2_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI2_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI2_1@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI2_1@toc@l --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v3, v3, 15 --; CHECK-NOVSX-NEXT: vsl v3, v4, v3 --; CHECK-NOVSX-NEXT: lvx v4, 0, r3 --; CHECK-NOVSX-NEXT: vsro v2, v2, v4 --; CHECK-NOVSX-NEXT: vspltb v4, v4, 15 --; CHECK-NOVSX-NEXT: vsr v2, v2, v4 --; CHECK-NOVSX-NEXT: vor v2, v3, v2 --; CHECK-NOVSX-NEXT: blr -+; P9-NOVSX-LABEL: rotl_96: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI2_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI2_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI2_1@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI2_1@toc@l -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v3, v3, 15 -+; P9-NOVSX-NEXT: vsl v3, v4, v3 -+; P9-NOVSX-NEXT: lvx v4, 0, r3 -+; P9-NOVSX-NEXT: vsro v2, v2, v4 -+; P9-NOVSX-NEXT: vspltb v4, v4, 15 -+; P9-NOVSX-NEXT: vsr v2, v2, v4 -+; P9-NOVSX-NEXT: vor v2, v3, v2 -+; P9-NOVSX-NEXT: blr -+; -+; P8-VSX-LABEL: rotl_96: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd vs0, v2 -+; P8-VSX-NEXT: li r3, 0 -+; P8-VSX-NEXT: mfvsrd r5, v2 -+; P8-VSX-NEXT: mffprd r4, f0 -+; P8-VSX-NEXT: mtfprd f0, r3 -+; P8-VSX-NEXT: sldi r3, r4, 32 -+; P8-VSX-NEXT: rotldi r4, r4, 32 -+; P8-VSX-NEXT: mtfprd f1, r3 -+; P8-VSX-NEXT: rldimi r4, r5, 32, 0 -+; P8-VSX-NEXT: rldicl r3, r5, 32, 32 -+; P8-VSX-NEXT: mtfprd f2, r4 -+; P8-VSX-NEXT: mtfprd f3, r3 -+; P8-VSX-NEXT: xxmrghd v2, vs1, vs0 -+; P8-VSX-NEXT: xxmrghd v3, vs3, vs2 -+; P8-VSX-NEXT: xxlor v2, v2, v3 -+; P8-VSX-NEXT: blr -+; -+; P8-NOVSX-LABEL: rotl_96: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI2_0@toc@ha -+; P8-NOVSX-NEXT: addis r4, r2, .LCPI2_1@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI2_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: addi r3, r4, .LCPI2_1@toc@l -+; P8-NOVSX-NEXT: lvx v4, 0, r3 -+; P8-NOVSX-NEXT: vslo v5, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsro v2, v2, v4 -+; P8-NOVSX-NEXT: vspltb v4, v4, 15 -+; P8-NOVSX-NEXT: vsl v3, v5, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v4 -+; P8-NOVSX-NEXT: vor v2, v3, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @rotl_16(<1 x i128> %num) { --; CHECK-VSX-LABEL: rotl_16: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI3_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI3_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: addis r3, r2, .LCPI3_1@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI3_1@toc@l --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v3, v3, 15 --; CHECK-VSX-NEXT: vsl v3, v4, v3 --; CHECK-VSX-NEXT: lxvx v4, 0, r3 --; CHECK-VSX-NEXT: vsro v2, v2, v4 --; CHECK-VSX-NEXT: vspltb v4, v4, 15 --; CHECK-VSX-NEXT: vsr v2, v2, v4 --; CHECK-VSX-NEXT: xxlor v2, v3, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: rotl_16: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI3_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI3_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: addis r3, r2, .LCPI3_1@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI3_1@toc@l -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v3, v3, 15 -+; P9-VSX-NEXT: vsl v3, v4, v3 -+; P9-VSX-NEXT: lxvx v4, 0, r3 -+; P9-VSX-NEXT: vsro v2, v2, v4 -+; P9-VSX-NEXT: vspltb v4, v4, 15 -+; P9-VSX-NEXT: vsr v2, v2, v4 -+; P9-VSX-NEXT: xxlor v2, v3, v2 -+; P9-VSX-NEXT: blr -+; -+; P9-NOVSX-LABEL: rotl_16: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI3_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI3_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI3_1@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI3_1@toc@l -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v3, v3, 15 -+; P9-NOVSX-NEXT: vsl v3, v4, v3 -+; P9-NOVSX-NEXT: lvx v4, 0, r3 -+; P9-NOVSX-NEXT: vsro v2, v2, v4 -+; P9-NOVSX-NEXT: vspltb v4, v4, 15 -+; P9-NOVSX-NEXT: vsr v2, v2, v4 -+; P9-NOVSX-NEXT: vor v2, v3, v2 -+; P9-NOVSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: rotl_16: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI3_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI3_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI3_1@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI3_1@toc@l --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v3, v3, 15 --; CHECK-NOVSX-NEXT: vsl v3, v4, v3 --; CHECK-NOVSX-NEXT: lvx v4, 0, r3 --; CHECK-NOVSX-NEXT: vsro v2, v2, v4 --; CHECK-NOVSX-NEXT: vspltb v4, v4, 15 --; CHECK-NOVSX-NEXT: vsr v2, v2, v4 --; CHECK-NOVSX-NEXT: vor v2, v3, v2 --; CHECK-NOVSX-NEXT: blr -+; P8-VSX-LABEL: rotl_16: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd vs0, v2 -+; P8-VSX-NEXT: li r3, 0 -+; P8-VSX-NEXT: mfvsrd r5, v2 -+; P8-VSX-NEXT: mffprd r4, f0 -+; P8-VSX-NEXT: mtfprd f0, r3 -+; P8-VSX-NEXT: rotldi r3, r4, 16 -+; P8-VSX-NEXT: sldi r4, r4, 16 -+; P8-VSX-NEXT: rldimi r3, r5, 16, 0 -+; P8-VSX-NEXT: mtfprd f1, r4 -+; P8-VSX-NEXT: rldicl r4, r5, 16, 48 -+; P8-VSX-NEXT: mtfprd f2, r3 -+; P8-VSX-NEXT: mtfprd f3, r4 -+; P8-VSX-NEXT: xxmrghd v2, vs2, vs1 -+; P8-VSX-NEXT: xxmrghd v3, vs0, vs3 -+; P8-VSX-NEXT: xxlor v2, v2, v3 -+; P8-VSX-NEXT: blr -+; -+; P8-NOVSX-LABEL: rotl_16: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI3_0@toc@ha -+; P8-NOVSX-NEXT: addis r4, r2, .LCPI3_1@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI3_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: addi r3, r4, .LCPI3_1@toc@l -+; P8-NOVSX-NEXT: lvx v4, 0, r3 -+; P8-NOVSX-NEXT: vslo v5, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsro v2, v2, v4 -+; P8-NOVSX-NEXT: vspltb v4, v4, 15 -+; P8-NOVSX-NEXT: vsl v3, v5, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v4 -+; P8-NOVSX-NEXT: vor v2, v3, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @rotl_112(<1 x i128> %num) { --; CHECK-VSX-LABEL: rotl_112: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI4_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI4_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: addis r3, r2, .LCPI4_1@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI4_1@toc@l --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v3, v3, 15 --; CHECK-VSX-NEXT: vsl v3, v4, v3 --; CHECK-VSX-NEXT: lxvx v4, 0, r3 --; CHECK-VSX-NEXT: vsro v2, v2, v4 --; CHECK-VSX-NEXT: vspltb v4, v4, 15 --; CHECK-VSX-NEXT: vsr v2, v2, v4 --; CHECK-VSX-NEXT: xxlor v2, v3, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: rotl_112: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI4_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI4_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: addis r3, r2, .LCPI4_1@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI4_1@toc@l -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v3, v3, 15 -+; P9-VSX-NEXT: vsl v3, v4, v3 -+; P9-VSX-NEXT: lxvx v4, 0, r3 -+; P9-VSX-NEXT: vsro v2, v2, v4 -+; P9-VSX-NEXT: vspltb v4, v4, 15 -+; P9-VSX-NEXT: vsr v2, v2, v4 -+; P9-VSX-NEXT: xxlor v2, v3, v2 -+; P9-VSX-NEXT: blr -+; -+; P9-NOVSX-LABEL: rotl_112: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI4_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI4_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI4_1@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI4_1@toc@l -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v3, v3, 15 -+; P9-NOVSX-NEXT: vsl v3, v4, v3 -+; P9-NOVSX-NEXT: lvx v4, 0, r3 -+; P9-NOVSX-NEXT: vsro v2, v2, v4 -+; P9-NOVSX-NEXT: vspltb v4, v4, 15 -+; P9-NOVSX-NEXT: vsr v2, v2, v4 -+; P9-NOVSX-NEXT: vor v2, v3, v2 -+; P9-NOVSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: rotl_112: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI4_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI4_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI4_1@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI4_1@toc@l --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v3, v3, 15 --; CHECK-NOVSX-NEXT: vsl v3, v4, v3 --; CHECK-NOVSX-NEXT: lvx v4, 0, r3 --; CHECK-NOVSX-NEXT: vsro v2, v2, v4 --; CHECK-NOVSX-NEXT: vspltb v4, v4, 15 --; CHECK-NOVSX-NEXT: vsr v2, v2, v4 --; CHECK-NOVSX-NEXT: vor v2, v3, v2 --; CHECK-NOVSX-NEXT: blr -+; P8-VSX-LABEL: rotl_112: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd vs0, v2 -+; P8-VSX-NEXT: li r3, 0 -+; P8-VSX-NEXT: mfvsrd r5, v2 -+; P8-VSX-NEXT: mffprd r4, f0 -+; P8-VSX-NEXT: mtfprd f0, r3 -+; P8-VSX-NEXT: sldi r3, r4, 48 -+; P8-VSX-NEXT: rotldi r4, r4, 48 -+; P8-VSX-NEXT: mtfprd f1, r3 -+; P8-VSX-NEXT: rldimi r4, r5, 48, 0 -+; P8-VSX-NEXT: rldicl r3, r5, 48, 16 -+; P8-VSX-NEXT: mtfprd f2, r4 -+; P8-VSX-NEXT: mtfprd f3, r3 -+; P8-VSX-NEXT: xxmrghd v2, vs1, vs0 -+; P8-VSX-NEXT: xxmrghd v3, vs3, vs2 -+; P8-VSX-NEXT: xxlor v2, v2, v3 -+; P8-VSX-NEXT: blr -+; -+; P8-NOVSX-LABEL: rotl_112: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI4_0@toc@ha -+; P8-NOVSX-NEXT: addis r4, r2, .LCPI4_1@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI4_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: addi r3, r4, .LCPI4_1@toc@l -+; P8-NOVSX-NEXT: lvx v4, 0, r3 -+; P8-NOVSX-NEXT: vslo v5, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsro v2, v2, v4 -+; P8-NOVSX-NEXT: vspltb v4, v4, 15 -+; P8-NOVSX-NEXT: vsl v3, v5, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v4 -+; P8-NOVSX-NEXT: vor v2, v3, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @rotl_8(<1 x i128> %num) { --; CHECK-VSX-LABEL: rotl_8: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI5_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI5_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: addis r3, r2, .LCPI5_1@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI5_1@toc@l --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v3, v3, 15 --; CHECK-VSX-NEXT: vsl v3, v4, v3 --; CHECK-VSX-NEXT: lxvx v4, 0, r3 --; CHECK-VSX-NEXT: vsro v2, v2, v4 --; CHECK-VSX-NEXT: vspltb v4, v4, 15 --; CHECK-VSX-NEXT: vsr v2, v2, v4 --; CHECK-VSX-NEXT: xxlor v2, v3, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: rotl_8: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI5_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI5_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: addis r3, r2, .LCPI5_1@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI5_1@toc@l -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v3, v3, 15 -+; P9-VSX-NEXT: vsl v3, v4, v3 -+; P9-VSX-NEXT: lxvx v4, 0, r3 -+; P9-VSX-NEXT: vsro v2, v2, v4 -+; P9-VSX-NEXT: vspltb v4, v4, 15 -+; P9-VSX-NEXT: vsr v2, v2, v4 -+; P9-VSX-NEXT: xxlor v2, v3, v2 -+; P9-VSX-NEXT: blr -+; -+; P9-NOVSX-LABEL: rotl_8: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI5_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI5_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI5_1@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI5_1@toc@l -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v3, v3, 15 -+; P9-NOVSX-NEXT: vsl v3, v4, v3 -+; P9-NOVSX-NEXT: lvx v4, 0, r3 -+; P9-NOVSX-NEXT: vsro v2, v2, v4 -+; P9-NOVSX-NEXT: vspltb v4, v4, 15 -+; P9-NOVSX-NEXT: vsr v2, v2, v4 -+; P9-NOVSX-NEXT: vor v2, v3, v2 -+; P9-NOVSX-NEXT: blr -+; -+; P8-VSX-LABEL: rotl_8: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd vs0, v2 -+; P8-VSX-NEXT: li r3, 0 -+; P8-VSX-NEXT: mfvsrd r5, v2 -+; P8-VSX-NEXT: mffprd r4, f0 -+; P8-VSX-NEXT: mtfprd f0, r3 -+; P8-VSX-NEXT: rotldi r3, r4, 8 -+; P8-VSX-NEXT: sldi r4, r4, 8 -+; P8-VSX-NEXT: rldimi r3, r5, 8, 0 -+; P8-VSX-NEXT: mtfprd f1, r4 -+; P8-VSX-NEXT: rldicl r4, r5, 8, 56 -+; P8-VSX-NEXT: mtfprd f2, r3 -+; P8-VSX-NEXT: mtfprd f3, r4 -+; P8-VSX-NEXT: xxmrghd v2, vs2, vs1 -+; P8-VSX-NEXT: xxmrghd v3, vs0, vs3 -+; P8-VSX-NEXT: xxlor v2, v2, v3 -+; P8-VSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: rotl_8: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI5_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI5_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI5_1@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI5_1@toc@l --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v3, v3, 15 --; CHECK-NOVSX-NEXT: vsl v3, v4, v3 --; CHECK-NOVSX-NEXT: lvx v4, 0, r3 --; CHECK-NOVSX-NEXT: vsro v2, v2, v4 --; CHECK-NOVSX-NEXT: vspltb v4, v4, 15 --; CHECK-NOVSX-NEXT: vsr v2, v2, v4 --; CHECK-NOVSX-NEXT: vor v2, v3, v2 --; CHECK-NOVSX-NEXT: blr -+; P8-NOVSX-LABEL: rotl_8: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI5_0@toc@ha -+; P8-NOVSX-NEXT: addis r4, r2, .LCPI5_1@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI5_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: addi r3, r4, .LCPI5_1@toc@l -+; P8-NOVSX-NEXT: lvx v4, 0, r3 -+; P8-NOVSX-NEXT: vslo v5, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsro v2, v2, v4 -+; P8-NOVSX-NEXT: vspltb v4, v4, 15 -+; P8-NOVSX-NEXT: vsl v3, v5, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v4 -+; P8-NOVSX-NEXT: vor v2, v3, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @rotl_120(<1 x i128> %num) { --; CHECK-VSX-LABEL: rotl_120: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI6_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI6_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: addis r3, r2, .LCPI6_1@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI6_1@toc@l --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v3, v3, 15 --; CHECK-VSX-NEXT: vsl v3, v4, v3 --; CHECK-VSX-NEXT: lxvx v4, 0, r3 --; CHECK-VSX-NEXT: vsro v2, v2, v4 --; CHECK-VSX-NEXT: vspltb v4, v4, 15 --; CHECK-VSX-NEXT: vsr v2, v2, v4 --; CHECK-VSX-NEXT: xxlor v2, v3, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: rotl_120: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI6_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI6_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: addis r3, r2, .LCPI6_1@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI6_1@toc@l -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v3, v3, 15 -+; P9-VSX-NEXT: vsl v3, v4, v3 -+; P9-VSX-NEXT: lxvx v4, 0, r3 -+; P9-VSX-NEXT: vsro v2, v2, v4 -+; P9-VSX-NEXT: vspltb v4, v4, 15 -+; P9-VSX-NEXT: vsr v2, v2, v4 -+; P9-VSX-NEXT: xxlor v2, v3, v2 -+; P9-VSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: rotl_120: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI6_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI6_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI6_1@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI6_1@toc@l --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v3, v3, 15 --; CHECK-NOVSX-NEXT: vsl v3, v4, v3 --; CHECK-NOVSX-NEXT: lvx v4, 0, r3 --; CHECK-NOVSX-NEXT: vsro v2, v2, v4 --; CHECK-NOVSX-NEXT: vspltb v4, v4, 15 --; CHECK-NOVSX-NEXT: vsr v2, v2, v4 --; CHECK-NOVSX-NEXT: vor v2, v3, v2 --; CHECK-NOVSX-NEXT: blr -+; P9-NOVSX-LABEL: rotl_120: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI6_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI6_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI6_1@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI6_1@toc@l -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v3, v3, 15 -+; P9-NOVSX-NEXT: vsl v3, v4, v3 -+; P9-NOVSX-NEXT: lvx v4, 0, r3 -+; P9-NOVSX-NEXT: vsro v2, v2, v4 -+; P9-NOVSX-NEXT: vspltb v4, v4, 15 -+; P9-NOVSX-NEXT: vsr v2, v2, v4 -+; P9-NOVSX-NEXT: vor v2, v3, v2 -+; P9-NOVSX-NEXT: blr -+; -+; P8-VSX-LABEL: rotl_120: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd vs0, v2 -+; P8-VSX-NEXT: li r3, 0 -+; P8-VSX-NEXT: mfvsrd r5, v2 -+; P8-VSX-NEXT: mffprd r4, f0 -+; P8-VSX-NEXT: mtfprd f0, r3 -+; P8-VSX-NEXT: sldi r3, r4, 56 -+; P8-VSX-NEXT: rotldi r4, r4, 56 -+; P8-VSX-NEXT: mtfprd f1, r3 -+; P8-VSX-NEXT: rldimi r4, r5, 56, 0 -+; P8-VSX-NEXT: rldicl r3, r5, 56, 8 -+; P8-VSX-NEXT: mtfprd f2, r4 -+; P8-VSX-NEXT: mtfprd f3, r3 -+; P8-VSX-NEXT: xxmrghd v2, vs1, vs0 -+; P8-VSX-NEXT: xxmrghd v3, vs3, vs2 -+; P8-VSX-NEXT: xxlor v2, v2, v3 -+; P8-VSX-NEXT: blr -+; -+; P8-NOVSX-LABEL: rotl_120: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI6_0@toc@ha -+; P8-NOVSX-NEXT: addis r4, r2, .LCPI6_1@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI6_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: addi r3, r4, .LCPI6_1@toc@l -+; P8-NOVSX-NEXT: lvx v4, 0, r3 -+; P8-NOVSX-NEXT: vslo v5, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsro v2, v2, v4 -+; P8-NOVSX-NEXT: vspltb v4, v4, 15 -+; P8-NOVSX-NEXT: vsl v3, v5, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v4 -+; P8-NOVSX-NEXT: vor v2, v3, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @rotl_28(<1 x i128> %num) { --; CHECK-VSX-LABEL: rotl_28: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI7_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI7_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: addis r3, r2, .LCPI7_1@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI7_1@toc@l --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v3, v3, 15 --; CHECK-VSX-NEXT: vsl v3, v4, v3 --; CHECK-VSX-NEXT: lxvx v4, 0, r3 --; CHECK-VSX-NEXT: vsro v2, v2, v4 --; CHECK-VSX-NEXT: vspltb v4, v4, 15 --; CHECK-VSX-NEXT: vsr v2, v2, v4 --; CHECK-VSX-NEXT: xxlor v2, v3, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: rotl_28: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI7_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI7_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: addis r3, r2, .LCPI7_1@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI7_1@toc@l -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v3, v3, 15 -+; P9-VSX-NEXT: vsl v3, v4, v3 -+; P9-VSX-NEXT: lxvx v4, 0, r3 -+; P9-VSX-NEXT: vsro v2, v2, v4 -+; P9-VSX-NEXT: vspltb v4, v4, 15 -+; P9-VSX-NEXT: vsr v2, v2, v4 -+; P9-VSX-NEXT: xxlor v2, v3, v2 -+; P9-VSX-NEXT: blr -+; -+; P9-NOVSX-LABEL: rotl_28: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI7_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI7_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI7_1@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI7_1@toc@l -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v3, v3, 15 -+; P9-NOVSX-NEXT: vsl v3, v4, v3 -+; P9-NOVSX-NEXT: lvx v4, 0, r3 -+; P9-NOVSX-NEXT: vsro v2, v2, v4 -+; P9-NOVSX-NEXT: vspltb v4, v4, 15 -+; P9-NOVSX-NEXT: vsr v2, v2, v4 -+; P9-NOVSX-NEXT: vor v2, v3, v2 -+; P9-NOVSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: rotl_28: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI7_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI7_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI7_1@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI7_1@toc@l --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v3, v3, 15 --; CHECK-NOVSX-NEXT: vsl v3, v4, v3 --; CHECK-NOVSX-NEXT: lvx v4, 0, r3 --; CHECK-NOVSX-NEXT: vsro v2, v2, v4 --; CHECK-NOVSX-NEXT: vspltb v4, v4, 15 --; CHECK-NOVSX-NEXT: vsr v2, v2, v4 --; CHECK-NOVSX-NEXT: vor v2, v3, v2 --; CHECK-NOVSX-NEXT: blr -+; P8-VSX-LABEL: rotl_28: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd vs0, v2 -+; P8-VSX-NEXT: li r3, 0 -+; P8-VSX-NEXT: mfvsrd r5, v2 -+; P8-VSX-NEXT: mffprd r4, f0 -+; P8-VSX-NEXT: mtfprd f0, r3 -+; P8-VSX-NEXT: rotldi r3, r4, 28 -+; P8-VSX-NEXT: sldi r4, r4, 28 -+; P8-VSX-NEXT: rldimi r3, r5, 28, 0 -+; P8-VSX-NEXT: mtfprd f1, r4 -+; P8-VSX-NEXT: rldicl r4, r5, 28, 36 -+; P8-VSX-NEXT: mtfprd f2, r3 -+; P8-VSX-NEXT: mtfprd f3, r4 -+; P8-VSX-NEXT: xxmrghd v2, vs2, vs1 -+; P8-VSX-NEXT: xxmrghd v3, vs0, vs3 -+; P8-VSX-NEXT: xxlor v2, v2, v3 -+; P8-VSX-NEXT: blr -+; -+; P8-NOVSX-LABEL: rotl_28: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI7_0@toc@ha -+; P8-NOVSX-NEXT: addis r4, r2, .LCPI7_1@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI7_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: addi r3, r4, .LCPI7_1@toc@l -+; P8-NOVSX-NEXT: lvx v4, 0, r3 -+; P8-NOVSX-NEXT: vslo v5, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsro v2, v2, v4 -+; P8-NOVSX-NEXT: vspltb v4, v4, 15 -+; P8-NOVSX-NEXT: vsl v3, v5, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v4 -+; P8-NOVSX-NEXT: vor v2, v3, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @NO_rotl(<1 x i128> %num) { --; CHECK-VSX-LABEL: NO_rotl: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: addis r3, r2, .LCPI8_0@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI8_0@toc@l --; CHECK-VSX-NEXT: lxvx v3, 0, r3 --; CHECK-VSX-NEXT: addis r3, r2, .LCPI8_1@toc@ha --; CHECK-VSX-NEXT: addi r3, r3, .LCPI8_1@toc@l --; CHECK-VSX-NEXT: vslo v4, v2, v3 --; CHECK-VSX-NEXT: vspltb v3, v3, 15 --; CHECK-VSX-NEXT: vsl v3, v4, v3 --; CHECK-VSX-NEXT: lxvx v4, 0, r3 --; CHECK-VSX-NEXT: vsro v2, v2, v4 --; CHECK-VSX-NEXT: vspltb v4, v4, 15 --; CHECK-VSX-NEXT: vsr v2, v2, v4 --; CHECK-VSX-NEXT: xxlor v2, v3, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: NO_rotl: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: addis r3, r2, .LCPI8_0@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI8_0@toc@l -+; P9-VSX-NEXT: lxvx v3, 0, r3 -+; P9-VSX-NEXT: addis r3, r2, .LCPI8_1@toc@ha -+; P9-VSX-NEXT: addi r3, r3, .LCPI8_1@toc@l -+; P9-VSX-NEXT: vslo v4, v2, v3 -+; P9-VSX-NEXT: vspltb v3, v3, 15 -+; P9-VSX-NEXT: vsl v3, v4, v3 -+; P9-VSX-NEXT: lxvx v4, 0, r3 -+; P9-VSX-NEXT: vsro v2, v2, v4 -+; P9-VSX-NEXT: vspltb v4, v4, 15 -+; P9-VSX-NEXT: vsr v2, v2, v4 -+; P9-VSX-NEXT: xxlor v2, v3, v2 -+; P9-VSX-NEXT: blr -+; -+; P9-NOVSX-LABEL: NO_rotl: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI8_0@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI8_0@toc@l -+; P9-NOVSX-NEXT: lvx v3, 0, r3 -+; P9-NOVSX-NEXT: addis r3, r2, .LCPI8_1@toc@ha -+; P9-NOVSX-NEXT: addi r3, r3, .LCPI8_1@toc@l -+; P9-NOVSX-NEXT: vslo v4, v2, v3 -+; P9-NOVSX-NEXT: vspltb v3, v3, 15 -+; P9-NOVSX-NEXT: vsl v3, v4, v3 -+; P9-NOVSX-NEXT: lvx v4, 0, r3 -+; P9-NOVSX-NEXT: vsro v2, v2, v4 -+; P9-NOVSX-NEXT: vspltb v4, v4, 15 -+; P9-NOVSX-NEXT: vsr v2, v2, v4 -+; P9-NOVSX-NEXT: vor v2, v3, v2 -+; P9-NOVSX-NEXT: blr -+; -+; P8-VSX-LABEL: NO_rotl: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd vs0, v2 -+; P8-VSX-NEXT: li r3, 0 -+; P8-VSX-NEXT: mfvsrd r5, v2 -+; P8-VSX-NEXT: mffprd r4, f0 -+; P8-VSX-NEXT: mtfprd f0, r3 -+; P8-VSX-NEXT: rotldi r3, r4, 20 -+; P8-VSX-NEXT: sldi r4, r4, 20 -+; P8-VSX-NEXT: rldimi r3, r5, 20, 0 -+; P8-VSX-NEXT: mtfprd f1, r4 -+; P8-VSX-NEXT: rldicl r4, r5, 28, 36 -+; P8-VSX-NEXT: mtfprd f2, r3 -+; P8-VSX-NEXT: mtfprd f3, r4 -+; P8-VSX-NEXT: xxmrghd v2, vs2, vs1 -+; P8-VSX-NEXT: xxmrghd v3, vs0, vs3 -+; P8-VSX-NEXT: xxlor v2, v2, v3 -+; P8-VSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: NO_rotl: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI8_0@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI8_0@toc@l --; CHECK-NOVSX-NEXT: lvx v3, 0, r3 --; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI8_1@toc@ha --; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI8_1@toc@l --; CHECK-NOVSX-NEXT: vslo v4, v2, v3 --; CHECK-NOVSX-NEXT: vspltb v3, v3, 15 --; CHECK-NOVSX-NEXT: vsl v3, v4, v3 --; CHECK-NOVSX-NEXT: lvx v4, 0, r3 --; CHECK-NOVSX-NEXT: vsro v2, v2, v4 --; CHECK-NOVSX-NEXT: vspltb v4, v4, 15 --; CHECK-NOVSX-NEXT: vsr v2, v2, v4 --; CHECK-NOVSX-NEXT: vor v2, v3, v2 --; CHECK-NOVSX-NEXT: blr -+; P8-NOVSX-LABEL: NO_rotl: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: addis r3, r2, .LCPI8_0@toc@ha -+; P8-NOVSX-NEXT: addis r4, r2, .LCPI8_1@toc@ha -+; P8-NOVSX-NEXT: addi r3, r3, .LCPI8_0@toc@l -+; P8-NOVSX-NEXT: lvx v3, 0, r3 -+; P8-NOVSX-NEXT: addi r3, r4, .LCPI8_1@toc@l -+; P8-NOVSX-NEXT: lvx v4, 0, r3 -+; P8-NOVSX-NEXT: vslo v5, v2, v3 -+; P8-NOVSX-NEXT: vspltb v3, v3, 15 -+; P8-NOVSX-NEXT: vsro v2, v2, v4 -+; P8-NOVSX-NEXT: vspltb v4, v4, 15 -+; P8-NOVSX-NEXT: vsl v3, v5, v3 -+; P8-NOVSX-NEXT: vsr v2, v2, v4 -+; P8-NOVSX-NEXT: vor v2, v3, v2 -+; P8-NOVSX-NEXT: blr - entry: - %shl = shl <1 x i128> %num, - %shr = lshr <1 x i128> %num, - %or = or <1 x i128> %shl, %shr - ret <1 x i128> %or - } - - define <1 x i128> @shufflevector(<1 x i128> %num) { --; CHECK-VSX-LABEL: shufflevector: --; CHECK-VSX: # %bb.0: # %entry --; CHECK-VSX-NEXT: xxswapd v2, v2 --; CHECK-VSX-NEXT: blr -+; P9-VSX-LABEL: shufflevector: -+; P9-VSX: # %bb.0: # %entry -+; P9-VSX-NEXT: xxswapd v2, v2 -+; P9-VSX-NEXT: blr -+; -+; P9-NOVSX-LABEL: shufflevector: -+; P9-NOVSX: # %bb.0: # %entry -+; P9-NOVSX-NEXT: vsldoi v2, v2, v2, 8 -+; P9-NOVSX-NEXT: blr -+; -+; P8-VSX-LABEL: shufflevector: -+; P8-VSX: # %bb.0: # %entry -+; P8-VSX-NEXT: xxswapd v2, v2 -+; P8-VSX-NEXT: blr - ; --; CHECK-NOVSX-LABEL: shufflevector: --; CHECK-NOVSX: # %bb.0: # %entry --; CHECK-NOVSX-NEXT: vsldoi v2, v2, v2, 8 --; CHECK-NOVSX-NEXT: blr -+; P8-NOVSX-LABEL: shufflevector: -+; P8-NOVSX: # %bb.0: # %entry -+; P8-NOVSX-NEXT: vsldoi v2, v2, v2, 8 -+; P8-NOVSX-NEXT: blr - entry: - %0 = bitcast <1 x i128> %num to <2 x i64> - %vecins2 = shufflevector <2 x i64> %0, <2 x i64> undef, <2 x i32> - %1 = bitcast <2 x i64> %vecins2 to <1 x i128> - ret <1 x i128> %1 - } -- 2.7.4