From 4879c8f3b06eebb498c28c3d2aa6bc0f3f9b961e Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sun, 6 Jun 2021 19:53:49 +0100 Subject: [PATCH] [X86][SSE] combineVectorTruncation - simplify PSHUFB-is-better logic. NFCI. OutSVT is guaranteed to be i8/i16 and we accept any InSVT that isn't i64 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 5d6dbd1..ea892b6 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -46546,9 +46546,7 @@ static SDValue combineVectorTruncation(SDNode *N, SelectionDAG &DAG, return SDValue(); // SSSE3's pshufb results in less instructions in the cases below. - if (Subtarget.hasSSSE3() && NumElems == 8 && - ((OutSVT == MVT::i8 && InSVT != MVT::i64) || - (InSVT == MVT::i32 && OutSVT == MVT::i16))) + if (Subtarget.hasSSSE3() && NumElems == 8 && InSVT != MVT::i64) return SDValue(); SDLoc DL(N); -- 2.7.4