From 483db141e395c52b6c803cbef82728ef5570f18f Mon Sep 17 00:00:00 2001 From: Andrea Di Biagio Date: Wed, 11 Jul 2018 15:27:50 +0000 Subject: [PATCH] [X86] Fix MayLoad/HasSideEffect flag for (V)MOVLPSrm instructions. Before revision 336728, the "mayLoad" flag for instruction (V)MOVLPSrm was inferred directly from the "default" pattern associated with the instruction definition. r336728 removed special node X86Movlps, and all the patterns associated to it. Now instruction (V)MOVLPSrm doesn't have a pattern associated to it, and the 'mayLoad/hasSideEffects' flags are left unset. When the instruction info is emitted by tablegen, method CodeGenDAGPatterns::InferInstructionFlags() sees that (V)MOVLPSrm doesn't have a pattern, and flags are undefined. So, it conservatively sets the "hasSideEffects" flag for it. As a consequence, we were losing the 'mayLoad' flag, and we were gaining a 'hasSideEffect' flag in its place. This patch fixes the issue (originally reported by Michael Holmen). The mca tests show the differences in the instruction info flags. Instructions that were affected by this problem were: MOVLPSrm/VMOVLPSrm/VMOVLPSZ128rm. Differential Revision: https://reviews.llvm.org/D49182 llvm-svn: 336818 --- llvm/lib/Target/X86/X86InstrAVX512.td | 2 +- llvm/lib/Target/X86/X86InstrSSE.td | 2 ++ llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/Broadwell/resources-avx1.s | 2 +- llvm/test/tools/llvm-mca/X86/Broadwell/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s | 2 +- llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/Generic/resources-avx1.s | 2 +- llvm/test/tools/llvm-mca/X86/Generic/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/Haswell/resources-avx1.s | 2 +- llvm/test/tools/llvm-mca/X86/Haswell/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/SandyBridge/resources-avx1.s | 2 +- llvm/test/tools/llvm-mca/X86/SandyBridge/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-avx1.s | 2 +- llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx1.s | 2 +- llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse1.s | 2 +- llvm/test/tools/llvm-mca/X86/Znver1/resources-avx1.s | 2 +- llvm/test/tools/llvm-mca/X86/Znver1/resources-sse1.s | 2 +- 20 files changed, 21 insertions(+), 19 deletions(-) diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index edc182d..98390ce 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -6385,7 +6385,7 @@ def VMOVHLPSZrr : AVX512PSI<0x12, MRMSrcReg, (outs VR128X:$dst), multiclass avx512_mov_hilo_packed opc, string OpcodeStr, SDPatternOperator OpNode, X86VectorVTInfo _> { - let ExeDomain = _.ExeDomain in + let hasSideEffects = 0, mayLoad = 1, ExeDomain = _.ExeDomain in def rm : AVX512opc, SDNode psnode, SDNode pdnode, string base_opc, string asm_opr> { + let hasSideEffects = 0, mayLoad = 1 in def PSrm : PIopc, SDNode psnode, SDNode pdnode, SSEPackedSingle>, PS, Sched<[SchedWriteFShuffle.XMM.Folded, ReadAfterLd]>; + let hasSideEffects = 0, mayLoad = 1 in def PDrm : PI