From 481efdd94dcacba36b297f05d83e6da9acdfc7b6 Mon Sep 17 00:00:00 2001 From: Eric Botcazou Date: Fri, 20 Nov 2015 11:04:43 +0000 Subject: [PATCH] md.texi (Standard Names): Move entry for addptr3 around... * doc/md.texi (Standard Names): Move entry for addptr3 around, add entries for addv4, subv4, mulv4, umulv4 and negv3, fixes glitch in entries for cbranch4 and jump. From-SVN: r230651 --- gcc/ChangeLog | 9 ++++++++- gcc/doc/md.texi | 51 +++++++++++++++++++++++++++++++++++++-------------- 2 files changed, 45 insertions(+), 15 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5157830..b94c812 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,7 +1,14 @@ +2015-11-20 Eric Botcazou + + * doc/md.texi (Standard Names): Move entry for addptr3 around, + add entries for addv4, subv4, mulv4, umulv4 and negv3, fixes + glitch in entries for cbranch4 and jump. + 2015-11-20 Tom de Vries PR tree-optimization/68373 - * tree-scalar-evolution.c (final_value_replacement_loop): Factor out of ... + * tree-scalar-evolution.c (final_value_replacement_loop): Factor out + of ... (scev_const_prop): ... here. * tree-scalar-evolution.h (final_value_replacement_loop): Declare. * tree-parloops.c (try_create_reduction_list): Call diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 8b2deaa..79f3cf1 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -4872,17 +4872,6 @@ Add operand 2 and operand 1, storing the result in operand 0. All operands must have mode @var{m}. This can be used even on two-address machines, by means of constraints requiring operands 1 and 0 to be the same location. -@cindex @code{addptr@var{m}3} instruction pattern -@item @samp{addptr@var{m}3} -Like @code{add@var{m}3} but is guaranteed to only be used for address -calculations. The expanded code is not allowed to clobber the -condition code. It only needs to be defined if @code{add@var{m}3} -sets the condition code. If adds used for address calculations and -normal adds are not compatible it is required to expand a distinct -pattern (e.g. using an unspec). The pattern is used by LRA to emit -address calculations. @code{add@var{m}3} is used if -@code{addptr@var{m}3} is not defined. - @cindex @code{ssadd@var{m}3} instruction pattern @cindex @code{usadd@var{m}3} instruction pattern @cindex @code{sub@var{m}3} instruction pattern @@ -4912,6 +4901,35 @@ address calculations. @code{add@var{m}3} is used if @itemx @samp{and@var{m}3}, @samp{ior@var{m}3}, @samp{xor@var{m}3} Similar, for other arithmetic operations. +@cindex @code{addv@var{m}4} instruction pattern +@item @samp{addv@var{m}4} +Like @code{add@var{m}3} but takes a @code{code_label} as operand 3 and +emits code to jump to it if signed overflow occurs during the addition. +This pattern is used to implement the built-in functions performing +signed integer addition with overflow checking. + +@cindex @code{subv@var{m}4} instruction pattern +@cindex @code{mulv@var{m}4} instruction pattern +@item @samp{subv@var{m}4}, @samp{mulv@var{m}4} +Similar, for other signed arithmetic operations. + +@cindex @code{umulv@var{m}4} instruction pattern +@item @samp{umulv@var{m}4} +Like @code{mulv@var{m}4} but for unsigned multiplication. That is to +say, the operation is the same as signed multiplication but the jump +is taken only on unsigned overflow. + +@cindex @code{addptr@var{m}3} instruction pattern +@item @samp{addptr@var{m}3} +Like @code{add@var{m}3} but is guaranteed to only be used for address +calculations. The expanded code is not allowed to clobber the +condition code. It only needs to be defined if @code{add@var{m}3} +sets the condition code. If adds used for address calculations and +normal adds are not compatible it is required to expand a distinct +pattern (e.g. using an unspec). The pattern is used by LRA to emit +address calculations. @code{add@var{m}3} is used if +@code{addptr@var{m}3} is not defined. + @cindex @code{fma@var{m}4} instruction pattern @item @samp{fma@var{m}4} Multiply operand 2 and operand 1, then add operand 3, storing the @@ -5277,6 +5295,11 @@ Reverse the order of bytes of operand 1 and store the result in operand 0. @item @samp{neg@var{m}2}, @samp{ssneg@var{m}2}, @samp{usneg@var{m}2} Negate operand 1 and store the result in operand 0. +@cindex @code{negv@var{m}3} instruction pattern +@item @samp{negv@var{m}3} +Like @code{neg@var{m}2} but takes a @code{code_label} as operand 2 and +emits code to jump to it if signed overflow occurs during the negation. + @cindex @code{abs@var{m}2} instruction pattern @item @samp{abs@var{m}2} Store the absolute value of operand 1 into operand 0. @@ -5926,13 +5949,13 @@ from the machine description. Conditional branch instruction combined with a compare instruction. Operand 0 is a comparison operator. Operand 1 and operand 2 are the first and second operands of the comparison, respectively. Operand 3 -is a @code{label_ref} that refers to the label to jump to. +is the @code{code_label} to jump to. @cindex @code{jump} instruction pattern @item @samp{jump} A jump inside a function; an unconditional branch. Operand 0 is the -@code{label_ref} of the label to jump to. This pattern name is mandatory -on all machines. +@code{code_label} to jump to. This pattern name is mandatory on all +machines. @cindex @code{call} instruction pattern @item @samp{call} -- 2.7.4