From 480e9a9e0b5def98b5646ebcb319dfed10994dc6 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 22 Oct 2022 21:21:51 +0100 Subject: [PATCH] [X86] Add test coverage for permilps with freeze Its going to be easier to add some basic target shuffle handling than generic ISD::SHUFFLE_VECTOR nodes which is going to need special handling for unused/undef operands. Both freeze_pshufd and freeze_permilps tests lower to vpermilps, but only in domain switching later on. --- llvm/test/CodeGen/X86/freeze-vector.ll | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll index c308059..6e51ed2 100644 --- a/llvm/test/CodeGen/X86/freeze-vector.ll +++ b/llvm/test/CodeGen/X86/freeze-vector.ll @@ -13,8 +13,8 @@ define <4 x i32> @freeze_insert_subvector(<8 x i32> %a0) nounwind { ret <4 x i32> %z } -define <4 x i32> @freeze_shufflevector(<4 x i32> %a0) nounwind { -; CHECK-LABEL: freeze_shufflevector: +define <4 x i32> @freeze_pshufd(<4 x i32> %a0) nounwind { +; CHECK-LABEL: freeze_pshufd: ; CHECK: # %bb.0: ; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] ; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] @@ -24,3 +24,15 @@ define <4 x i32> @freeze_shufflevector(<4 x i32> %a0) nounwind { %z = shufflevector <4 x i32> %y, <4 x i32> poison, <4 x i32> ret <4 x i32> %z } + +define <4 x float> @freeze_permilps(<4 x float> %a0) nounwind { +; CHECK-LABEL: freeze_permilps: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] +; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] +; CHECK-NEXT: ret{{[l|q]}} + %x = shufflevector <4 x float> %a0, <4 x float> poison, <4 x i32> + %y = freeze <4 x float> %x + %z = shufflevector <4 x float> %y, <4 x float> poison, <4 x i32> + ret <4 x float> %z +} -- 2.7.4