From 47e64abe1a0c5ee4e8e16ff837e1423a102acb0b Mon Sep 17 00:00:00 2001 From: "Kevin B. Smith" Date: Mon, 22 Feb 2016 01:27:56 +0000 Subject: [PATCH] [X86] More test updates to support fixup-byte-word-insts optimization either on or off. Differential Revisions: http://reviews.llvm.org/D17458 llvm-svn: 261505 --- .../test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll | 6 ++++-- llvm/test/CodeGen/X86/MergeConsecutiveStores.ll | 9 ++++++--- llvm/test/CodeGen/X86/half.ll | 17 ++++++++++------- llvm/test/CodeGen/X86/return-ext.ll | 13 ++++++++++--- llvm/test/CodeGen/X86/store-narrow.ll | 12 ++++++++---- 5 files changed, 38 insertions(+), 19 deletions(-) diff --git a/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll b/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll index de95e79..581fae2 100644 --- a/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll +++ b/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll @@ -1,9 +1,11 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -march=x86 -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF +; RUN: llc < %s -march=x86 -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON ; These transforms are turned off for load volatiles and stores. ; Check that they weren't turned off for all loads and stores! ; CHECK-LABEL: f: ; CHECK-NOT: movsd -; CHECK: movw +; BWOFF: movw +; BWON: movzwl ; CHECK: addw @atomic = global double 0.000000e+00 ; [#uses=1] diff --git a/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll b/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll index 70af418..ce1779b 100644 --- a/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll +++ b/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll @@ -1,4 +1,5 @@ -; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s +; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -addr-sink-using-gep=1 < %s | FileCheck %s %struct.A = type { i8, i8, i8, i8, i8, i8, i8, i8 } @@ -147,7 +148,8 @@ define void @merge_nonconst_store(i32 %count, i8 %zz, %struct.A* nocapture %p) n ; CHECK-LABEL: merge_loads_i16: ; load: -; CHECK: movw +; BWON: movzwl +; BWOFF: movw ; store: ; CHECK: movw ; CHECK: ret @@ -180,7 +182,8 @@ define void @merge_loads_i16(i32 %count, %struct.A* noalias nocapture %q, %struc ; The loads and the stores are interleaved. Can't merge them. ; CHECK-LABEL: no_merge_loads: -; CHECK: movb +; BWON: movzbl +; BWOFF: movb ; CHECK: movb ; CHECK: movb ; CHECK: movb diff --git a/llvm/test/CodeGen/X86/half.ll b/llvm/test/CodeGen/X86/half.ll index 43e6aa8..442c67e 100644 --- a/llvm/test/CodeGen/X86/half.ll +++ b/llvm/test/CodeGen/X86/half.ll @@ -1,14 +1,17 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false \ -; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c -asm-verbose=false \ -; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-F16C -; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr +sse2 -asm-verbose=false \ +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false -fixup-byte-word-insts=1 \ +; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL -check-prefix=BWON +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false -fixup-byte-word-insts=0 \ +; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL -check-prefix=BWOFF +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c -asm-verbose=false -fixup-byte-word-insts=1 \ +; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-F16C -check-prefix=BWON +; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr +sse2 -asm-verbose=false -fixup-byte-word-insts=0 \ ; RUN: | FileCheck %s -check-prefix=CHECK-I686 define void @test_load_store(half* %in, half* %out) { ; CHECK-LABEL: test_load_store: -; CHECK: movw (%rdi), [[TMP:%[a-z0-9]+]] -; CHECK: movw [[TMP]], (%rsi) +; BWON: movzwl (%rdi), %eax +; BWOFF: movw (%rdi), %ax +; CHECK: movw %ax, (%rsi) %val = load half, half* %in store half %val, half* %out ret void diff --git a/llvm/test/CodeGen/X86/return-ext.ll b/llvm/test/CodeGen/X86/return-ext.ll index 8110add..79c89d0 100644 --- a/llvm/test/CodeGen/X86/return-ext.ll +++ b/llvm/test/CodeGen/X86/return-ext.ll @@ -1,5 +1,11 @@ -; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=0 | \ +; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s +; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \ +; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWON %s +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -fixup-byte-word-insts=0 | \ +; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s +; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \ +; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWON %s ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s @@ -71,7 +77,8 @@ entry: ; i16 return values are not extended. ; CHECK-LABEL: unsigned_i16: -; CHECK: movw +; BWOFF: movw +; BWON: movzwl ; CHECK-NEXT: addw ; CHECK-NEXT: ret diff --git a/llvm/test/CodeGen/X86/store-narrow.ll b/llvm/test/CodeGen/X86/store-narrow.ll index 6c1c56e..16f152d 100644 --- a/llvm/test/CodeGen/X86/store-narrow.ll +++ b/llvm/test/CodeGen/X86/store-narrow.ll @@ -1,6 +1,7 @@ ; rdar://7860110 ; RUN: llc -asm-verbose=false < %s | FileCheck %s -check-prefix=X64 -; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s -check-prefix=X32 +; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON +; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.2" @@ -50,7 +51,8 @@ entry: ; X64: movw %si, (%rdi) ; X32-LABEL: test3: -; X32: movw 8(%esp), %ax +; X32-BWON: movzwl 8(%esp), %eax +; X32-BWOFF: movw 8(%esp), %ax ; X32: movw %ax, (%{{.*}}) } @@ -67,7 +69,8 @@ entry: ; X64: movw %si, 2(%rdi) ; X32-LABEL: test4: -; X32: movw 8(%esp), %[[REG:[abcd]]]x +; X32-BWON: movzwl 8(%esp), %e[[REG:[abcd]]]x +; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x ; X32: movw %[[REG]]x, 2(%{{.*}}) } @@ -84,7 +87,8 @@ entry: ; X64: movw %si, 2(%rdi) ; X32-LABEL: test5: -; X32: movw 8(%esp), %[[REG:[abcd]]]x +; X32-BWON: movzwl 8(%esp), %e[[REG:[abcd]]]x +; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x ; X32: movw %[[REG]]x, 2(%{{.*}}) } -- 2.7.4