From 47e577eb92194d6c0851c118eca75e010ae5f1af Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Fri, 18 Nov 2016 23:22:00 +0000 Subject: [PATCH] [InstCombine] add tests to show likely unwanted select widening; NFC This is a prerequisite patch for D26556: https://reviews.llvm.org/D26556 ...because there was no direct coverage for these folds (which in some cases are adding instructions). llvm-svn: 287400 --- llvm/test/Transforms/InstCombine/select-bitext.ll | 270 ++++++++++++++++++++++ 1 file changed, 270 insertions(+) diff --git a/llvm/test/Transforms/InstCombine/select-bitext.ll b/llvm/test/Transforms/InstCombine/select-bitext.ll index 5fe6c67..6e374f5 100644 --- a/llvm/test/Transforms/InstCombine/select-bitext.ll +++ b/llvm/test/Transforms/InstCombine/select-bitext.ll @@ -1,6 +1,38 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s +; Widen a select of constants to eliminate an extend. + +define i16 @sel_sext_constants(i1 %cmp) { +; CHECK-LABEL: @sel_sext_constants( +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i16 -1, i16 42 +; CHECK-NEXT: ret i16 [[EXT]] +; + %sel = select i1 %cmp, i8 255, i8 42 + %ext = sext i8 %sel to i16 + ret i16 %ext +} + +define i16 @sel_zext_constants(i1 %cmp) { +; CHECK-LABEL: @sel_zext_constants( +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i16 255, i16 42 +; CHECK-NEXT: ret i16 [[EXT]] +; + %sel = select i1 %cmp, i8 255, i8 42 + %ext = zext i8 %sel to i16 + ret i16 %ext +} + +define double @sel_fpext_constants(i1 %cmp) { +; CHECK-LABEL: @sel_fpext_constants( +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, double -2.550000e+02, double 4.200000e+01 +; CHECK-NEXT: ret double [[EXT]] +; + %sel = select i1 %cmp, float -255.0, float 42.0 + %ext = fpext float %sel to double + ret double %ext +} + ; FIXME: We should not grow the size of the select in the next 4 cases. define i64 @sel_sext(i32 %a, i1 %cmp) { @@ -47,6 +79,244 @@ define <4 x i64> @sel_zext_vec(<4 x i32> %a, <4 x i1> %cmp) { ret <4 x i64> %ext } +; FIXME: The next 18 tests cycle through trunc+select and {larger,smaller,equal} {sext,zext,fpext} {scalar,vector}. +; The only cases where we eliminate an instruction are equal zext with scalar/vector, so that's probably the only +; way to justify widening the select. + +define i64 @trunc_sel_larger_sext(i32 %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_larger_sext( +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %a to i16 +; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[TRUNC]] to i64 +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i64 [[TMP1]], i64 42 +; CHECK-NEXT: ret i64 [[EXT]] +; + %trunc = trunc i32 %a to i16 + %sel = select i1 %cmp, i16 %trunc, i16 42 + %ext = sext i16 %sel to i64 + ret i64 %ext +} + +define <2 x i64> @trunc_sel_larger_sext_vec(<2 x i32> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_larger_sext_vec( +; CHECK-NEXT: [[TRUNC:%.*]] = zext <2 x i32> %a to <2 x i64> +; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i64> [[TRUNC]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i64> [[SEXT]], +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i64> [[TMP1]], <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[EXT]] +; + %trunc = trunc <2 x i32> %a to <2 x i16> + %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> + %ext = sext <2 x i16> %sel to <2 x i64> + ret <2 x i64> %ext +} + +define i32 @trunc_sel_smaller_sext(i64 %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_smaller_sext( +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 %a to i16 +; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[TRUNC]] to i32 +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i32 [[TMP1]], i32 42 +; CHECK-NEXT: ret i32 [[EXT]] +; + %trunc = trunc i64 %a to i16 + %sel = select i1 %cmp, i16 %trunc, i16 42 + %ext = sext i16 %sel to i32 + ret i32 %ext +} + +define <2 x i32> @trunc_sel_smaller_sext_vec(<2 x i64> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_smaller_sext_vec( +; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> %a to <2 x i32> +; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i32> [[TRUNC]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> [[SEXT]], +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i32> [[TMP1]], <2 x i32> +; CHECK-NEXT: ret <2 x i32> [[EXT]] +; + %trunc = trunc <2 x i64> %a to <2 x i16> + %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> + %ext = sext <2 x i16> %sel to <2 x i32> + ret <2 x i32> %ext +} + +define i32 @trunc_sel_equal_sext(i32 %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_equal_sext( +; CHECK-NEXT: [[SEXT:%.*]] = shl i32 %a, 16 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i32 [[SEXT]], 16 +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i32 [[TMP1]], i32 42 +; CHECK-NEXT: ret i32 [[EXT]] +; + %trunc = trunc i32 %a to i16 + %sel = select i1 %cmp, i16 %trunc, i16 42 + %ext = sext i16 %sel to i32 + ret i32 %ext +} + +define <2 x i32> @trunc_sel_equal_sext_vec(<2 x i32> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_equal_sext_vec( +; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i32> %a, +; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> [[SEXT]], +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i32> [[TMP1]], <2 x i32> +; CHECK-NEXT: ret <2 x i32> [[EXT]] +; + %trunc = trunc <2 x i32> %a to <2 x i16> + %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> + %ext = sext <2 x i16> %sel to <2 x i32> + ret <2 x i32> %ext +} + +define i64 @trunc_sel_larger_zext(i32 %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_larger_zext( +; CHECK-NEXT: [[TRUNC_MASK:%.*]] = and i32 %a, 65535 +; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TRUNC_MASK]] to i64 +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i64 [[TMP1]], i64 42 +; CHECK-NEXT: ret i64 [[EXT]] +; + %trunc = trunc i32 %a to i16 + %sel = select i1 %cmp, i16 %trunc, i16 42 + %ext = zext i16 %sel to i64 + ret i64 %ext +} + +define <2 x i64> @trunc_sel_larger_zext_vec(<2 x i32> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_larger_zext_vec( +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> %a, +; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i64> [[TMP2]], <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[EXT]] +; + %trunc = trunc <2 x i32> %a to <2 x i16> + %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> + %ext = zext <2 x i16> %sel to <2 x i64> + ret <2 x i64> %ext +} + +define i32 @trunc_sel_smaller_zext(i64 %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_smaller_zext( +; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %a to i32 +; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 65535 +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i32 [[TMP2]], i32 42 +; CHECK-NEXT: ret i32 [[EXT]] +; + %trunc = trunc i64 %a to i16 + %sel = select i1 %cmp, i16 %trunc, i16 42 + %ext = zext i16 %sel to i32 + ret i32 %ext +} + +define <2 x i32> @trunc_sel_smaller_zext_vec(<2 x i64> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_smaller_zext_vec( +; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> %a to <2 x i32> +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[TRUNC]], +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i32> [[TMP1]], <2 x i32> +; CHECK-NEXT: ret <2 x i32> [[EXT]] +; + %trunc = trunc <2 x i64> %a to <2 x i16> + %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> + %ext = zext <2 x i16> %sel to <2 x i32> + ret <2 x i32> %ext +} + +define i32 @trunc_sel_equal_zext(i32 %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_equal_zext( +; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, 65535 +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i32 [[TMP1]], i32 42 +; CHECK-NEXT: ret i32 [[EXT]] +; + %trunc = trunc i32 %a to i16 + %sel = select i1 %cmp, i16 %trunc, i16 42 + %ext = zext i16 %sel to i32 + ret i32 %ext +} + +define <2 x i32> @trunc_sel_equal_zext_vec(<2 x i32> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_equal_zext_vec( +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> %a, +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x i32> [[TMP1]], <2 x i32> +; CHECK-NEXT: ret <2 x i32> [[EXT]] +; + %trunc = trunc <2 x i32> %a to <2 x i16> + %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> + %ext = zext <2 x i16> %sel to <2 x i32> + ret <2 x i32> %ext +} + +define double @trunc_sel_larger_fpext(float %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_larger_fpext( +; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc float %a to half +; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to double +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, double [[TMP1]], double 4.200000e+01 +; CHECK-NEXT: ret double [[EXT]] +; + %trunc = fptrunc float %a to half + %sel = select i1 %cmp, half %trunc, half 42.0 + %ext = fpext half %sel to double + ret double %ext +} + +define <2 x double> @trunc_sel_larger_fpext_vec(<2 x float> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_larger_fpext_vec( +; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x float> %a to <2 x half> +; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x double> +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x double> [[TMP1]], <2 x double> +; CHECK-NEXT: ret <2 x double> [[EXT]] +; + %trunc = fptrunc <2 x float> %a to <2 x half> + %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> + %ext = fpext <2 x half> %sel to <2 x double> + ret <2 x double> %ext +} + +define float @trunc_sel_smaller_fpext(double %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_smaller_fpext( +; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc double %a to half +; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to float +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, float [[TMP1]], float 4.200000e+01 +; CHECK-NEXT: ret float [[EXT]] +; + %trunc = fptrunc double %a to half + %sel = select i1 %cmp, half %trunc, half 42.0 + %ext = fpext half %sel to float + ret float %ext +} + +define <2 x float> @trunc_sel_smaller_fpext_vec(<2 x double> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_smaller_fpext_vec( +; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x double> %a to <2 x half> +; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x float> +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x float> [[TMP1]], <2 x float> +; CHECK-NEXT: ret <2 x float> [[EXT]] +; + %trunc = fptrunc <2 x double> %a to <2 x half> + %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> + %ext = fpext <2 x half> %sel to <2 x float> + ret <2 x float> %ext +} + +define float @trunc_sel_equal_fpext(float %a, i1 %cmp) { +; CHECK-LABEL: @trunc_sel_equal_fpext( +; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc float %a to half +; CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TRUNC]] to float +; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, float [[TMP1]], float 4.200000e+01 +; CHECK-NEXT: ret float [[EXT]] +; + %trunc = fptrunc float %a to half + %sel = select i1 %cmp, half %trunc, half 42.0 + %ext = fpext half %sel to float + ret float %ext +} + +define <2 x float> @trunc_sel_equal_fpext_vec(<2 x float> %a, <2 x i1> %cmp) { +; CHECK-LABEL: @trunc_sel_equal_fpext_vec( +; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <2 x float> %a to <2 x half> +; CHECK-NEXT: [[TMP1:%.*]] = fpext <2 x half> [[TRUNC]] to <2 x float> +; CHECK-NEXT: [[EXT:%.*]] = select <2 x i1> %cmp, <2 x float> [[TMP1]], <2 x float> +; CHECK-NEXT: ret <2 x float> [[EXT]] +; + %trunc = fptrunc <2 x float> %a to <2 x half> + %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> + %ext = fpext <2 x half> %sel to <2 x float> + ret <2 x float> %ext +} + define i32 @test_sext1(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_sext1( ; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 %ccb, %cca -- 2.7.4