From 47d263a6d8d8335d612334e7956cdfb674696a46 Mon Sep 17 00:00:00 2001 From: Matt Roper Date: Fri, 14 May 2021 08:36:59 -0700 Subject: [PATCH] drm/i915/adl_p: Extend PLANE_WM bits for blocks & lines ADL-P further extends the bits in PLANE_WM that represent blocks and lines; we need to extend our masks accordingly. Since these bits are reserved and MBZ on earlier platforms, it's safe to use the larger bitmask on all platforms. Bspec: 50419 Cc: Matt Atwood Signed-off-by: Matt Roper Signed-off-by: Clinton Taylor Reviewed-by: Anusha Srivatsa Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-8-matthew.d.roper@intel.com --- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7dd8089..c01de83 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6429,8 +6429,8 @@ enum { #define _CUR_WM_TRANS_B_0 0x71168 #define PLANE_WM_EN (1 << 31) #define PLANE_WM_IGNORE_LINES (1 << 30) -#define PLANE_WM_LINES_MASK REG_GENMASK(21, 14) -#define PLANE_WM_BLOCKS_MASK 0x7ff /* skl+: 10 bits, icl+ 11 bits */ +#define PLANE_WM_LINES_MASK REG_GENMASK(26, 14) +#define PLANE_WM_BLOCKS_MASK REG_GENMASK(11, 0) #define _CUR_WM_0(pipe) _PIPE(pipe, _CUR_WM_A_0, _CUR_WM_B_0) #define CUR_WM(pipe, level) _MMIO(_CUR_WM_0(pipe) + ((4) * (level))) -- 2.7.4