From 479249bce6b9fe32d665e0265e2a5d22d4fb484d Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Tue, 9 Jun 2020 15:23:30 -0700 Subject: [PATCH] iris/icl+: Report same caching domain as main surface for clear color BO. Even though the clear color BO is bound as a read-only buffer, report the same caching domain as the main BO in use_surface() (typically IRIS_DOMAIN_RENDER_WRITE) in order to avoid ping-ponging back and forth between IRIS_DOMAIN_RENDER_WRITE and IRIS_DOMAIN_OTHER_READ, which leads to increased stall-at-pixel-scoreboard synchronization between draw calls. Fixes a 5%-10% FPS regression in some benchmarks spotted on ICL. Reported-by: Clayton Craft Fixes: eb5d1c27227302167d299 "iris: Annotate all BO uses with domain and sequence number information." Closes: #3097 Reviewed-by: Kenneth Graunke Part-of: --- src/gallium/drivers/iris/iris_state.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 5b8a53f..462a040 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -4641,8 +4641,7 @@ use_surface(struct iris_context *ice, if (res->aux.bo) { iris_use_pinned_bo(batch, res->aux.bo, writeable, access); if (res->aux.clear_color_bo) - iris_use_pinned_bo(batch, res->aux.clear_color_bo, - false, IRIS_DOMAIN_OTHER_READ); + iris_use_pinned_bo(batch, res->aux.clear_color_bo, false, access); if (memcmp(&res->aux.clear_color, &surf->clear_color, sizeof(surf->clear_color)) != 0) { -- 2.7.4