From 477b178276921913bc282195723b684c225692e5 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 12 Dec 2014 02:30:29 +0000 Subject: [PATCH] R600/SI: Don't promote f32 select to i32 This is nice for the instruction patterns, but it complicates min / max matching. The select doesn't have the correct type and would require looking through the bitcasts for the real float operands. llvm-svn: 224092 --- llvm/lib/Target/R600/SIISelLowering.cpp | 2 -- llvm/lib/Target/R600/SIInstructions.td | 5 +++++ llvm/test/CodeGen/R600/seto.ll | 2 +- llvm/test/CodeGen/R600/setuo.ll | 2 +- llvm/test/CodeGen/R600/sint_to_fp.ll | 2 +- llvm/test/CodeGen/R600/uint_to_fp.ll | 2 +- 6 files changed, 9 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index f4acbf4..e41cad2 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -93,8 +93,6 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : setOperationAction(ISD::STORE, MVT::v2i32, Custom); setOperationAction(ISD::STORE, MVT::v4i32, Custom); - setOperationAction(ISD::SELECT, MVT::f32, Promote); - AddPromotedToType(ISD::SELECT, MVT::f32, MVT::i32); setOperationAction(ISD::SELECT, MVT::i64, Custom); setOperationAction(ISD::SELECT, MVT::f64, Promote); AddPromotedToType(ISD::SELECT, MVT::f64, MVT::i64); diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index eb7c987..aeba351 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -3184,6 +3184,11 @@ def : Pat < (V_ALIGNBIT_B32 $a, $a, 8)) >; +def : Pat < + (f32 (select i1:$src2, f32:$src1, f32:$src0)), + (V_CNDMASK_B32_e64 $src0, $src1, $src2) +>; + //============================================================================// // Miscellaneous Optimization Patterns //============================================================================// diff --git a/llvm/test/CodeGen/R600/seto.ll b/llvm/test/CodeGen/R600/seto.ll index 5fe6ff6..634f35c 100644 --- a/llvm/test/CodeGen/R600/seto.ll +++ b/llvm/test/CodeGen/R600/seto.ll @@ -2,7 +2,7 @@ ; CHECK-LABEL: {{^}}main: ; CHECK: v_cmp_o_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], [[SREG:s[0-9]+]], [[SREG]] -; CHECK-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, 1.0, [[CMP]] +; CHECK-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0.0, 1.0, [[CMP]] define void @main(float %p) { main_body: %c = fcmp oeq float %p, %p diff --git a/llvm/test/CodeGen/R600/setuo.ll b/llvm/test/CodeGen/R600/setuo.ll index a391177..efa4e6c 100644 --- a/llvm/test/CodeGen/R600/setuo.ll +++ b/llvm/test/CodeGen/R600/setuo.ll @@ -2,7 +2,7 @@ ; CHECK-LABEL: {{^}}main: ; CHECK: v_cmp_u_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], [[SREG:s[0-9]+]], [[SREG]] -; CHECK-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, 1.0, [[CMP]] +; CHECK-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0.0, 1.0, [[CMP]] define void @main(float %p) { main_body: %c = fcmp une float %p, %p diff --git a/llvm/test/CodeGen/R600/sint_to_fp.ll b/llvm/test/CodeGen/R600/sint_to_fp.ll index 7b6ce43..1d10487 100644 --- a/llvm/test/CodeGen/R600/sint_to_fp.ll +++ b/llvm/test/CodeGen/R600/sint_to_fp.ll @@ -42,7 +42,7 @@ define void @sint_to_fp_v4i32(<4 x float> addrspace(1)* %out, <4 x i32> addrspac ; FUNC-LABEL: {{^}}sint_to_fp_i1_f32: ; SI: v_cmp_eq_i32_e64 [[CMP:s\[[0-9]+:[0-9]\]]], -; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1.0, [[CMP]] +; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0.0, 1.0, [[CMP]] ; SI: buffer_store_dword [[RESULT]], ; SI: s_endpgm define void @sint_to_fp_i1_f32(float addrspace(1)* %out, i32 %in) { diff --git a/llvm/test/CodeGen/R600/uint_to_fp.ll b/llvm/test/CodeGen/R600/uint_to_fp.ll index f3bc62a..a7692ac 100644 --- a/llvm/test/CodeGen/R600/uint_to_fp.ll +++ b/llvm/test/CodeGen/R600/uint_to_fp.ll @@ -60,7 +60,7 @@ entry: ; FUNC-LABEL: {{^}}uint_to_fp_i1_to_f32: ; SI: v_cmp_eq_i32_e64 [[CMP:s\[[0-9]+:[0-9]\]]], -; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1.0, [[CMP]] +; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0.0, 1.0, [[CMP]] ; SI: buffer_store_dword [[RESULT]], ; SI: s_endpgm define void @uint_to_fp_i1_to_f32(float addrspace(1)* %out, i32 %in) { -- 2.7.4