From 4712a714154626ec37b1818aa8db24d0ab65d110 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 16 Dec 2021 12:14:18 +0000 Subject: [PATCH] [X86] Rename LowerScalarImmediateShift/LowerScalarVariableShift helpers. NFC. Rename them to LowerShiftByScalarImmediate/LowerShiftByScalarVariable to make it easier to find them wrt LowerShift() --- llvm/lib/Target/X86/X86ISelLowering.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 8308129..cdad73f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -28954,8 +28954,8 @@ static bool supportedVectorVarShift(MVT VT, const X86Subtarget &Subtarget, return (Opcode == ISD::SRA) ? AShift : LShift; } -static SDValue LowerScalarImmediateShift(SDValue Op, SelectionDAG &DAG, - const X86Subtarget &Subtarget) { +static SDValue LowerShiftByScalarImmediate(SDValue Op, SelectionDAG &DAG, + const X86Subtarget &Subtarget) { MVT VT = Op.getSimpleValueType(); SDLoc dl(Op); SDValue R = Op.getOperand(0); @@ -29085,8 +29085,8 @@ static SDValue LowerScalarImmediateShift(SDValue Op, SelectionDAG &DAG, return SDValue(); } -static SDValue LowerScalarVariableShift(SDValue Op, SelectionDAG &DAG, - const X86Subtarget &Subtarget) { +static SDValue LowerShiftByScalarVariable(SDValue Op, SelectionDAG &DAG, + const X86Subtarget &Subtarget) { MVT VT = Op.getSimpleValueType(); SDLoc dl(Op); SDValue R = Op.getOperand(0); @@ -29244,10 +29244,10 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget, assert(VT.isVector() && "Custom lowering only for vector shifts!"); assert(Subtarget.hasSSE2() && "Only custom lower when we have SSE2!"); - if (SDValue V = LowerScalarImmediateShift(Op, DAG, Subtarget)) + if (SDValue V = LowerShiftByScalarImmediate(Op, DAG, Subtarget)) return V; - if (SDValue V = LowerScalarVariableShift(Op, DAG, Subtarget)) + if (SDValue V = LowerShiftByScalarVariable(Op, DAG, Subtarget)) return V; if (supportedVectorVarShift(VT, Subtarget, Opc)) @@ -29999,7 +29999,7 @@ static SDValue LowerRotate(SDValue Op, const X86Subtarget &Subtarget, // ISD::ROT* uses modulo rotate amounts. if (SDValue BaseRotAmt = DAG.getSplatValue(Amt)) { // If the amount is a splat, perform the modulo BEFORE the splat, - // this helps LowerScalarVariableShift to remove the splat later. + // this helps LowerShiftByScalarVariable to remove the splat later. Amt = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VT, BaseRotAmt); Amt = DAG.getNode(ISD::AND, DL, VT, Amt, AmtMask); Amt = DAG.getVectorShuffle(VT, DL, Amt, DAG.getUNDEF(VT), @@ -52180,7 +52180,7 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT, case X86ISD::VSHLI: case X86ISD::VSRLI: // Special case: SHL/SRL AVX1 V4i64 by 32-bits can lower as a shuffle. - // TODO: Move this to LowerScalarImmediateShift? + // TODO: Move this to LowerShiftByScalarImmediate? if (VT == MVT::v4i64 && !Subtarget.hasInt256() && llvm::all_of(Ops, [](SDValue Op) { return Op.getConstantOperandAPInt(1) == 32; -- 2.7.4