From 46d5df53abcc548c4c1ede243c946762f245419f Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Fri, 7 Nov 2014 20:42:11 +0000 Subject: [PATCH] [ASan] Fix zero_page_pc test for PowerPC Summary: In the Power architecture, all branch instructions ignore the 2 least significant bits of the target address. Consequently if you branch to an invalid address, the address reported along with the SIGSEGV will have been rounded down to a multiple of 4. Tweak this test accordingly. This may fix the test for ARM too, in which case we could remove the XFAIL, but I have no way of testing that. Reviewers: kcc, willschm, glider, samsonov Reviewed By: samsonov Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6167 llvm-svn: 221542 --- compiler-rt/test/asan/TestCases/zero_page_pc.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/compiler-rt/test/asan/TestCases/zero_page_pc.cc b/compiler-rt/test/asan/TestCases/zero_page_pc.cc index 53615dd..ae741e6 100644 --- a/compiler-rt/test/asan/TestCases/zero_page_pc.cc +++ b/compiler-rt/test/asan/TestCases/zero_page_pc.cc @@ -7,8 +7,8 @@ typedef void void_f(); int main() { - void_f *func = (void_f *)0x7; + void_f *func = (void_f *)0x4; func(); - // CHECK: {{AddressSanitizer: SEGV.*(pc.*0007)}} + // CHECK: {{AddressSanitizer: SEGV.*(pc.*0004)}} return 0; } -- 2.7.4