From 46776f7556a337ebf210b1cac838bca2aaa15351 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Martin=20Storsj=C3=B6?= Date: Tue, 5 Apr 2022 11:34:05 +0300 Subject: [PATCH] Fix warnings about variables that are set but only used in debug mode Add void casts to mark the variables used, next to the places where they are used in assert or `LLVM_DEBUG()` expressions. Differential Revision: https://reviews.llvm.org/D123117 --- lld/wasm/InputFiles.cpp | 1 + lld/wasm/SyntheticSections.cpp | 1 + llvm/lib/Analysis/LoopInfo.cpp | 1 + llvm/lib/CodeGen/MIRFSDiscriminator.cpp | 1 + llvm/lib/CodeGen/RegAllocPBQP.cpp | 1 + llvm/lib/CodeGen/StackColoring.cpp | 3 +++ llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp | 1 + llvm/lib/Target/X86/X86FastTileConfig.cpp | 1 + llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp | 1 + llvm/lib/Transforms/Scalar/GVN.cpp | 1 + llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp | 1 + llvm/lib/Transforms/Utils/SimplifyIndVar.cpp | 1 + llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp | 1 + llvm/utils/TableGen/CodeGenRegisters.cpp | 1 + llvm/utils/TableGen/DFAEmitter.cpp | 1 + llvm/utils/TableGen/GlobalISelEmitter.cpp | 1 + llvm/utils/TableGen/RegisterInfoEmitter.cpp | 2 +- 17 files changed, 19 insertions(+), 1 deletion(-) diff --git a/lld/wasm/InputFiles.cpp b/lld/wasm/InputFiles.cpp index f887b61..f6f3537 100644 --- a/lld/wasm/InputFiles.cpp +++ b/lld/wasm/InputFiles.cpp @@ -689,6 +689,7 @@ void ArchiveFile::parse() { ++count; } LLVM_DEBUG(dbgs() << "Read " << count << " symbols\n"); + (void) count; } void ArchiveFile::addMember(const Archive::Symbol *sym) { diff --git a/lld/wasm/SyntheticSections.cpp b/lld/wasm/SyntheticSections.cpp index 7bc9c27..6dde746 100644 --- a/lld/wasm/SyntheticSections.cpp +++ b/lld/wasm/SyntheticSections.cpp @@ -589,6 +589,7 @@ void ElemSection::writeBody() { uint32_t tableIndex = config->tableBase; for (const FunctionSymbol *sym : indirectFunctions) { assert(sym->getTableIndex() == tableIndex); + (void) tableIndex; writeUleb128(os, sym->getFunctionIndex(), "function index"); ++tableIndex; } diff --git a/llvm/lib/Analysis/LoopInfo.cpp b/llvm/lib/Analysis/LoopInfo.cpp index 293c22a..7d46e1c 100644 --- a/llvm/lib/Analysis/LoopInfo.cpp +++ b/llvm/lib/Analysis/LoopInfo.cpp @@ -736,6 +736,7 @@ void UnloopUpdater::updateBlockParents() { bool Changed = FoundIB; for (unsigned NIters = 0; Changed; ++NIters) { assert(NIters < Unloop.getNumBlocks() && "runaway iterative algorithm"); + (void) NIters; // Iterate over the postorder list of blocks, propagating the nearest loop // from successors to predecessors as before. diff --git a/llvm/lib/CodeGen/MIRFSDiscriminator.cpp b/llvm/lib/CodeGen/MIRFSDiscriminator.cpp index 90b1725..3152102 100644 --- a/llvm/lib/CodeGen/MIRFSDiscriminator.cpp +++ b/llvm/lib/CodeGen/MIRFSDiscriminator.cpp @@ -135,6 +135,7 @@ bool MIRAddFSDiscriminators::runOnMachineFunction(MachineFunction &MF) { if (Changed) { createFSDiscriminatorVariable(MF.getFunction().getParent()); LLVM_DEBUG(dbgs() << "Num of FS Discriminators: " << NumNewD << "\n"); + (void) NumNewD; } return Changed; diff --git a/llvm/lib/CodeGen/RegAllocPBQP.cpp b/llvm/lib/CodeGen/RegAllocPBQP.cpp index 93be8f6..8c26213 100644 --- a/llvm/lib/CodeGen/RegAllocPBQP.cpp +++ b/llvm/lib/CodeGen/RegAllocPBQP.cpp @@ -847,6 +847,7 @@ bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) { while (!PBQPAllocComplete) { LLVM_DEBUG(dbgs() << " PBQP Regalloc round " << Round << ":\n"); + (void) Round; PBQPRAGraph G(PBQPRAGraph::GraphMetadata(MF, LIS, MBFI)); initializeGraph(G, VRM, *VRegSpiller); diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp index 2a59b12..de549ef 100644 --- a/llvm/lib/CodeGen/StackColoring.cpp +++ b/llvm/lib/CodeGen/StackColoring.cpp @@ -1143,6 +1143,9 @@ void StackColoring::remapInstructions(DenseMap &SlotRemap) { LLVM_DEBUG(dbgs() << "Fixed " << FixedMemOp << " machine memory operands.\n"); LLVM_DEBUG(dbgs() << "Fixed " << FixedDbg << " debug locations.\n"); LLVM_DEBUG(dbgs() << "Fixed " << FixedInstr << " machine instructions.\n"); + (void) FixedMemOp; + (void) FixedDbg; + (void) FixedInstr; } void StackColoring::removeInvalidSlotRanges() { diff --git a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp index 4cdf5f1..37a65b6 100644 --- a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp +++ b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp @@ -223,6 +223,7 @@ AArch64A53Fix835769::runOnBasicBlock(MachineBasicBlock &MBB) { if (isFirstInstructionInSequence(PrevInstr) && isSecondInstructionInSequence(CurrInstr)) { LLVM_DEBUG(dbgs() << " ** pattern found at Idx " << Idx << "!\n"); + (void) Idx; Sequences.push_back(CurrInstr); } } diff --git a/llvm/lib/Target/X86/X86FastTileConfig.cpp b/llvm/lib/Target/X86/X86FastTileConfig.cpp index 061fff5..5ff8482 100644 --- a/llvm/lib/Target/X86/X86FastTileConfig.cpp +++ b/llvm/lib/Target/X86/X86FastTileConfig.cpp @@ -154,6 +154,7 @@ MachineInstr *X86FastTileConfig::getKeyAMXInstr(MachineInstr *MI) { if (isAMXInstr(*II)) { assert((KeyAMXNum == 0) && "Too many Key AMX instruction!"); + (void) KeyAMXNum; KeyAMXNum++; KeyMI = &*II; } diff --git a/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp b/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp index d421894..b9fc0ce 100644 --- a/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp +++ b/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp @@ -1457,6 +1457,7 @@ void PGOUseFunc::populateCounters() { } LLVM_DEBUG(dbgs() << "Populate counts in " << NumPasses << " passes.\n"); + (void) NumPasses; #ifndef NDEBUG // Assert every BB has a valid counter. for (auto &BB : F) { diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp b/llvm/lib/Transforms/Scalar/GVN.cpp index b3c19ee..e0d78c9 100644 --- a/llvm/lib/Transforms/Scalar/GVN.cpp +++ b/llvm/lib/Transforms/Scalar/GVN.cpp @@ -2593,6 +2593,7 @@ bool GVNPass::runImpl(Function &F, AssumptionCache &RunAC, DominatorTree &RunDT, unsigned Iteration = 0; while (ShouldContinue) { LLVM_DEBUG(dbgs() << "GVN iteration: " << Iteration << "\n"); + (void) Iteration; ShouldContinue = iterateOnFunction(F); Changed |= ShouldContinue; ++Iteration; diff --git a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp index 9d7ea43..970462fa 100644 --- a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp +++ b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp @@ -2087,6 +2087,7 @@ static void relocationViaAlloca( assert(PromotableAllocas.size() == Live.size() + NumRematerializedValues && "we must have the same allocas with lives"); + (void) NumRematerializedValues; if (!PromotableAllocas.empty()) { // Apply mem2reg to promote alloca to SSA PromoteMemToReg(PromotableAllocas, DT); diff --git a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp index 3b0bd86..71cce3e 100644 --- a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp +++ b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp @@ -870,6 +870,7 @@ void SimplifyIndvar::simplifyUsers(PHINode *CurrIV, IVVisitor *V) { Instruction *IVOperand = UseOper.second; for (unsigned N = 0; IVOperand; ++N) { assert(N <= Simplified.size() && "runaway iteration"); + (void) N; Value *NewOper = foldIVUser(UseInst, IVOperand); if (!NewOper) diff --git a/llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp b/llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp index 4a69f96..7deeaef 100644 --- a/llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp +++ b/llvm/tools/llvm-tli-checker/llvm-tli-checker.cpp @@ -338,6 +338,7 @@ int main(int argc, char *argv[]) { assert(TLIandSDKboth + TLIandSDKneither + TLIdoesSDKdoesnt + TLIdoesntSDKdoes == LibFunc::NumLibFuncs); + (void) TLIandSDKneither; outs() << "<< Total TLI yes SDK no: " << TLIdoesSDKdoesnt << "\n>> Total TLI no SDK yes: " << TLIdoesntSDKdoes << "\n== Total TLI yes SDK yes: " << TLIandSDKboth; diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp index 073e43a..65bcd6f 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.cpp +++ b/llvm/utils/TableGen/CodeGenRegisters.cpp @@ -1814,6 +1814,7 @@ void CodeGenRegBank::computeRegUnitWeights() { unsigned NumIters = 0; for (bool Changed = true; Changed; ++NumIters) { assert(NumIters <= NumNativeRegUnits && "Runaway register unit weights"); + (void) NumIters; Changed = false; for (auto &Reg : Registers) { CodeGenRegister::RegUnitList NormalUnits; diff --git a/llvm/utils/TableGen/DFAEmitter.cpp b/llvm/utils/TableGen/DFAEmitter.cpp index aa3327a..f2d9165 100644 --- a/llvm/utils/TableGen/DFAEmitter.cpp +++ b/llvm/utils/TableGen/DFAEmitter.cpp @@ -305,6 +305,7 @@ void Automaton::emit(raw_ostream &OS) { } LLVM_DEBUG(dbgs() << " NFA automaton has " << SeenStates.size() << " states with " << NumTransitions << " transitions.\n"); + (void) NumTransitions; const auto &ActionTypes = Transitions.back().getTypes(); OS << "// The type of an action in the " << Name << " automaton.\n"; diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp index 751c06f..707a364 100644 --- a/llvm/utils/TableGen/GlobalISelEmitter.cpp +++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp @@ -5534,6 +5534,7 @@ std::vector GlobalISelEmitter::optimizeRules( ProcessCurrentGroup(); LLVM_DEBUG(dbgs() << "NumGroups: " << NumGroups << "\n"); + (void) NumGroups; assert(CurrentGroup->empty() && "The last group wasn't properly processed"); return OptRules; } diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp index 8a9ce15..cafe233 100644 --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -753,7 +753,7 @@ RegisterInfoEmitter::emitComposeSubRegIndices(raw_ostream &OS, } OS << " };\n\n"; - OS << " --IdxA; assert(IdxA < " << SubRegIndicesSize << ");\n" + OS << " --IdxA; assert(IdxA < " << SubRegIndicesSize << "); (void) IdxA;\n" << " --IdxB; assert(IdxB < " << SubRegIndicesSize << ");\n"; if (Rows.size() > 1) OS << " return Rows[RowMap[IdxA]][IdxB];\n"; -- 2.7.4