From 467215c20f4befed253696dd6910839bacf75837 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Andreas=20F=C3=A4rber?= Date: Fri, 21 Jun 2013 22:09:01 +0200 Subject: [PATCH] target-i386: Change gen_intermediate_code_internal() argument to X86CPU MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Also use bool type while at it. Prepares for moving singlestep_enabled field to CPUState. Reviewed-by: Richard Henderson Signed-off-by: Andreas Färber --- target-i386/translate.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 14b0298..6550c27 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -8251,10 +8251,11 @@ void optimize_flags_init(void) /* generate intermediate code in gen_opc_buf and gen_opparam_buf for basic block 'tb'. If search_pc is TRUE, also generate PC information for each intermediate instruction. */ -static inline void gen_intermediate_code_internal(CPUX86State *env, +static inline void gen_intermediate_code_internal(X86CPU *cpu, TranslationBlock *tb, - int search_pc) + bool search_pc) { + CPUX86State *env = &cpu->env; DisasContext dc1, *dc = &dc1; target_ulong pc_ptr; uint16_t *gen_opc_end; @@ -8428,12 +8429,12 @@ static inline void gen_intermediate_code_internal(CPUX86State *env, void gen_intermediate_code(CPUX86State *env, TranslationBlock *tb) { - gen_intermediate_code_internal(env, tb, 0); + gen_intermediate_code_internal(x86_env_get_cpu(env), tb, false); } void gen_intermediate_code_pc(CPUX86State *env, TranslationBlock *tb) { - gen_intermediate_code_internal(env, tb, 1); + gen_intermediate_code_internal(x86_env_get_cpu(env), tb, true); } void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb, int pc_pos) -- 2.7.4