From 4663d6fc9c1291dee014057d25245b62a1ec6738 Mon Sep 17 00:00:00 2001 From: Chia-I Wu Date: Thu, 1 Dec 2022 18:34:23 -0800 Subject: [PATCH] turnip: fix dynamic logicop state When a pipeline has dynamic logicop state or blend state, we defer lrz write decision to tu6_calculate_lrz_state. As such, tu6_calculate_lrz_state should look at both states when either of them is dynamic. Fixes dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.21 on angle, which uses dynamic logicop state and static blend state with blending enabled. Fixes: c8c7154c2ec ("tu: Implement extendedDynamicState3ColorBlendEnable") Part-of: --- src/freedreno/vulkan/tu_lrz.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/freedreno/vulkan/tu_lrz.c b/src/freedreno/vulkan/tu_lrz.c index 81830ec..c9580ca 100644 --- a/src/freedreno/vulkan/tu_lrz.c +++ b/src/freedreno/vulkan/tu_lrz.c @@ -675,18 +675,18 @@ tu6_calculate_lrz_state(struct tu_cmd_buffer *cmd, /* See comment in tu_pipeline about disabling LRZ write for blending. */ - if ((cmd->state.pipeline->dynamic_state_mask & BIT(TU_DYNAMIC_STATE_LOGIC_OP)) && - cmd->state.logic_op_enabled && cmd->state.rop_reads_dst) { - if (gras_lrz_cntl.lrz_write) - perf_debug(cmd->device, "disabling lrz write due to dynamic logic op"); - gras_lrz_cntl.lrz_write = false; - } - - if ((cmd->state.pipeline->dynamic_state_mask & BIT(TU_DYNAMIC_STATE_BLEND_ENABLE)) && - cmd->state.blend_enable) { - if (gras_lrz_cntl.lrz_write) - perf_debug(cmd->device, "disabling lrz write due to dynamic blend"); - gras_lrz_cntl.lrz_write = false; + if (gras_lrz_cntl.lrz_write && cmd->state.pipeline->dynamic_state_mask & + (BIT(TU_DYNAMIC_STATE_LOGIC_OP) | + BIT(TU_DYNAMIC_STATE_BLEND_ENABLE))) { + if (cmd->state.logic_op_enabled && cmd->state.rop_reads_dst) { + perf_debug(cmd->device, "disabling lrz write due to dynamic logic op"); + gras_lrz_cntl.lrz_write = false; + } + + if (cmd->state.blend_enable) { + perf_debug(cmd->device, "disabling lrz write due to dynamic blend"); + gras_lrz_cntl.lrz_write = false; + } } if ((cmd->state.pipeline->dynamic_state_mask & BIT(TU_DYNAMIC_STATE_BLEND))) { -- 2.7.4