From 44f29ad9a4d3131afbc616ad15e4bdf4586cf9a0 Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Thu, 6 Oct 2022 11:53:54 +0200 Subject: [PATCH] drm/udl: Add register constants for framebuffer scanout addresses Add register constants for the framebuffer scanout addresses and update the related helper functions. No functional changes. v2: * extract address bytes with helper macros (Javier) * fix comments Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Link: https://patchwork.freedesktop.org/patch/msgid/20221006095355.23579-16-tzimmermann@suse.de --- drivers/gpu/drm/udl/udl_modeset.c | 33 ++++++++++++++++++++++++--------- drivers/gpu/drm/udl/udl_proto.h | 14 ++++++++++++++ 2 files changed, 38 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/udl/udl_modeset.c b/drivers/gpu/drm/udl/udl_modeset.c index ea0388c..4462653 100644 --- a/drivers/gpu/drm/udl/udl_modeset.c +++ b/drivers/gpu/drm/udl/udl_modeset.c @@ -8,6 +8,8 @@ * Copyright (C) 2009 Bernie Thompson */ +#include + #include #include #include @@ -59,23 +61,36 @@ static char *udl_set_color_depth(char *buf, u8 selection) return udl_set_register(buf, UDL_REG_COLORDEPTH, selection); } -static char *udl_set_base16bpp(char *wrptr, u32 base) +static char *udl_set_base16bpp(char *buf, u32 base) { - /* the base pointer is 16 bits wide, 0x20 is hi byte. */ - wrptr = udl_set_register(wrptr, 0x20, base >> 16); - wrptr = udl_set_register(wrptr, 0x21, base >> 8); - return udl_set_register(wrptr, 0x22, base); + /* the base pointer is 24 bits wide, 0x20 is hi byte. */ + u8 reg20 = FIELD_GET(UDL_BASE_ADDR2_MASK, base); + u8 reg21 = FIELD_GET(UDL_BASE_ADDR1_MASK, base); + u8 reg22 = FIELD_GET(UDL_BASE_ADDR0_MASK, base); + + buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR2, reg20); + buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR1, reg21); + buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR0, reg22); + + return buf; } /* * DisplayLink HW has separate 16bpp and 8bpp framebuffers. * In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer */ -static char *udl_set_base8bpp(char *wrptr, u32 base) +static char *udl_set_base8bpp(char *buf, u32 base) { - wrptr = udl_set_register(wrptr, 0x26, base >> 16); - wrptr = udl_set_register(wrptr, 0x27, base >> 8); - return udl_set_register(wrptr, 0x28, base); + /* the base pointer is 24 bits wide, 0x26 is hi byte. */ + u8 reg26 = FIELD_GET(UDL_BASE_ADDR2_MASK, base); + u8 reg27 = FIELD_GET(UDL_BASE_ADDR1_MASK, base); + u8 reg28 = FIELD_GET(UDL_BASE_ADDR0_MASK, base); + + buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR2, reg26); + buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR1, reg27); + buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR0, reg28); + + return buf; } static char *udl_set_register_16(char *wrptr, u8 reg, u16 value) diff --git a/drivers/gpu/drm/udl/udl_proto.h b/drivers/gpu/drm/udl/udl_proto.h index 8e7d1a0..8f143e7 100644 --- a/drivers/gpu/drm/udl/udl_proto.h +++ b/drivers/gpu/drm/udl/udl_proto.h @@ -3,6 +3,8 @@ #ifndef UDL_PROTO_H #define UDL_PROTO_H +#include + /* Color depth */ #define UDL_REG_COLORDEPTH 0x00 #define UDL_COLORDEPTH_16BPP 0 @@ -31,6 +33,18 @@ #define UDL_BLANKMODE_HSYNC_OFF 0x05 /* hsync off, blanked */ #define UDL_BLANKMODE_POWERDOWN 0x07 /* powered off; requires modeset */ +/* Framebuffer address */ +#define UDL_REG_BASE16BPP_ADDR2 0x20 +#define UDL_REG_BASE16BPP_ADDR1 0x21 +#define UDL_REG_BASE16BPP_ADDR0 0x22 +#define UDL_REG_BASE8BPP_ADDR2 0x26 +#define UDL_REG_BASE8BPP_ADDR1 0x27 +#define UDL_REG_BASE8BPP_ADDR0 0x28 + +#define UDL_BASE_ADDR0_MASK GENMASK(7, 0) +#define UDL_BASE_ADDR1_MASK GENMASK(15, 8) +#define UDL_BASE_ADDR2_MASK GENMASK(23, 16) + /* Lock/unlock video registers */ #define UDL_REG_VIDREG 0xff #define UDL_VIDREG_LOCK 0x00 -- 2.7.4