From 44b260cb0aab387d85e4d59c16fc7b8866264f5e Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sat, 8 Aug 2020 11:03:16 -0700 Subject: [PATCH] [X86] Increase the number of instructions searched for isSafeToClobberEFLAGS in a couple places Previously this function searched 4 instructions forwards or backwards to determine if it was ok to clobber eflags. This is called in 3 places: rematerialization, turning 2 operand leas into adds or splitting 3 ops leas into an lea and add on some CPU targets. This patch increases the search limit to 10 instructions for rematerialization and 2 operand lea to add. I've left the old treshold for 3 ops lea spliting as that increases code size. Fixes PR47024 and PR43014 --- llvm/lib/Target/X86/X86FixupLEAs.cpp | 2 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 2 +- llvm/lib/Target/X86/X86InstrInfo.h | 5 +++-- llvm/test/CodeGen/X86/optimize-max-0.ll | 4 ++-- 4 files changed, 7 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/X86/X86FixupLEAs.cpp b/llvm/lib/Target/X86/X86FixupLEAs.cpp index 4242790..fcc3e8f 100644 --- a/llvm/lib/Target/X86/X86FixupLEAs.cpp +++ b/llvm/lib/Target/X86/X86FixupLEAs.cpp @@ -376,7 +376,7 @@ bool FixupLEAPass::optTwoAddrLEA(MachineBasicBlock::iterator &I, const MachineOperand &Segment = MI.getOperand(1 + X86::AddrSegmentReg); if (Segment.getReg() != 0 || !Disp.isImm() || Scale.getImm() > 1 || - !TII->isSafeToClobberEFLAGS(MBB, I)) + !TII->isSafeToClobberEFLAGS(MBB, I, 10)) return false; Register DestReg = MI.getOperand(0).getReg(); diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index c753880..b27959a 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -1127,7 +1127,7 @@ void X86InstrInfo::reMaterialize(MachineBasicBlock &MBB, const MachineInstr &Orig, const TargetRegisterInfo &TRI) const { bool ClobbersEFLAGS = Orig.modifiesRegister(X86::EFLAGS, &TRI); - if (ClobbersEFLAGS && !isSafeToClobberEFLAGS(MBB, I)) { + if (ClobbersEFLAGS && !isSafeToClobberEFLAGS(MBB, I, 10)) { // The instruction clobbers EFLAGS. Re-materialize as MOV32ri to avoid side // effects. int Value; diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h index c345a82..60b7d51 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.h +++ b/llvm/lib/Target/X86/X86InstrInfo.h @@ -442,8 +442,9 @@ public: /// conservative. If it cannot definitely determine the safety after visiting /// a few instructions in each direction it assumes it's not safe. bool isSafeToClobberEFLAGS(MachineBasicBlock &MBB, - MachineBasicBlock::iterator I) const { - return MBB.computeRegisterLiveness(&RI, X86::EFLAGS, I, 4) == + MachineBasicBlock::iterator I, + unsigned Neighborhood = 4) const { + return MBB.computeRegisterLiveness(&RI, X86::EFLAGS, I, Neighborhood) == MachineBasicBlock::LQR_Dead; } diff --git a/llvm/test/CodeGen/X86/optimize-max-0.ll b/llvm/test/CodeGen/X86/optimize-max-0.ll index e7f8856..5367f39 100644 --- a/llvm/test/CodeGen/X86/optimize-max-0.ll +++ b/llvm/test/CodeGen/X86/optimize-max-0.ll @@ -85,7 +85,7 @@ define void @foo(i8* %r, i32 %s, i32 %w, i32 %x, i8* %j, i32 %d) nounwind { ; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi -; CHECK-NEXT: leal 2(%esi), %esi +; CHECK-NEXT: addl $2, %esi ; CHECK-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; CHECK-NEXT: movl (%esp), %esi ## 4-byte Reload ; CHECK-NEXT: addl %esi, %ecx @@ -513,7 +513,7 @@ define void @bar(i8* %r, i32 %s, i32 %w, i32 %x, i8* %j, i32 %d) nounwind { ; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; CHECK-NEXT: addl %eax, %ecx ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx -; CHECK-NEXT: leal 2(%edx), %edx +; CHECK-NEXT: addl $2, %edx ; CHECK-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload ; CHECK-NEXT: addl %edx, %eax -- 2.7.4