From 4480d372d963645fff191afb76195506d014e3bc Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Thu, 11 Mar 2010 09:55:19 +0900 Subject: [PATCH] s5pc110: aquila: OneNAND Sync Write support & clock gate Signed-off-by: Kyungmin Park --- board/samsung/universal/lowlevel_init.S | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/board/samsung/universal/lowlevel_init.S b/board/samsung/universal/lowlevel_init.S index a3796be..86769c9 100644 --- a/board/samsung/universal/lowlevel_init.S +++ b/board/samsung/universal/lowlevel_init.S @@ -223,13 +223,18 @@ lowlevel_init: * BL[11:9] : Continuous * VHF[3] : Very High Frequency Enable (Over 83MHz) * HF[2] : High Frequency Enable (Over 66MHz) + * WM[1] : Sync Write */ cmp r7, r8 - ldrne r1, =0xE004 + ldrne r1, =0xE006 ldrne r0, =0xB001E442 strneh r1, [r0] - ldrne r1, =0x2E004 + /* + * GCE[26] : Gated Clock Enable + * RPE[17] : Enables Read Prefetch + */ + ldrne r1, =((1 << 26) | (1 << 17) | 0xE006) ldrne r0, =0xB0600000 strne r1, [r0, #0x100] @ ONENAND_IF_CTRL ldrne r1, =0x1212 -- 2.7.4