From 4334b524274203125193a08a8485250c41c2daa9 Mon Sep 17 00:00:00 2001 From: "Vladimir N. Makarov" Date: Wed, 20 Jan 2021 11:40:14 -0500 Subject: [PATCH] [PR98722] LRA: Check that target has no 3-op add insn to transform 2 plus expression. Patch cf2ac1c30af0fa783c8d72e527904dda5d8cc330 for solving PR97969 was assumed for targets with absent 3-op add insn. But the original patch did not check this. This patch adds the check. gcc/ChangeLog: PR rtl-optimization/98722 * lra-eliminations.c (eliminate_regs_in_insn): Check that target has no 3-op add insn to transform insns containing two pluses. gcc/testsuite/ChangeLog: PR rtl-optimization/98722 * g++.target/s390/pr98722.C: New. --- gcc/lra-eliminations.c | 5 ++++- gcc/testsuite/g++.target/s390/pr98722.C | 12 ++++++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.target/s390/pr98722.C diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c index ebcadd1..5b97175 100644 --- a/gcc/lra-eliminations.c +++ b/gcc/lra-eliminations.c @@ -1057,7 +1057,10 @@ eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p, reg2 = SUBREG_REG (reg2); if (REG_P (reg1) && REG_P (reg2) && REGNO (reg1) < FIRST_PSEUDO_REGISTER - && REGNO (reg2) >= FIRST_PSEUDO_REGISTER) + && REGNO (reg2) >= FIRST_PSEUDO_REGISTER + && GET_MODE (reg1) == Pmode + && !have_addptr3_insn (gen_reg_rtx (Pmode), reg1, + XEXP (XEXP (SET_SRC (set), 0), 1))) { XEXP (XEXP (SET_SRC (set), 0), 0) = op2; XEXP (SET_SRC (set), 1) = op1; diff --git a/gcc/testsuite/g++.target/s390/pr98722.C b/gcc/testsuite/g++.target/s390/pr98722.C new file mode 100644 index 0000000..64edaf3 --- /dev/null +++ b/gcc/testsuite/g++.target/s390/pr98722.C @@ -0,0 +1,12 @@ +// { dg-do compile } +// { dg-options "-Og -fno-tree-fre -fno-split-wide-types" } +struct B { + virtual void Method(); +}; +typedef void (B::*fn_type_a)(); + +int main() { + fn_type_a f(&B::Method); + B b; + (b.*f)(); +} -- 2.7.4