From 430cc90071e759362b1c7b7d2583d4c6edf60457 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Fri, 11 Sep 2020 17:17:51 +0100 Subject: [PATCH] aco: use nir_get_io_offset_src() in visit_load_input() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Rhys Perry Reviewed-by: Timur Kristóf Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 101bcf3..03d986a 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -4735,21 +4735,21 @@ void visit_load_input(isel_context *ctx, nir_intrinsic_instr *instr) ctx->allocated_vec.emplace(dst.id(), elems); } } else if (ctx->shader->info.stage == MESA_SHADER_FRAGMENT) { - unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1; - nir_instr *off_instr = instr->src[offset_idx].ssa->parent_instr; + nir_src *off_src = nir_get_io_offset_src(instr); + nir_instr *off_instr = off_src->ssa->parent_instr; if (off_instr->type != nir_instr_type_load_const || nir_instr_as_load_const(off_instr)->value[0].u32 != 0) { isel_err(off_instr, "Unimplemented nir_intrinsic_load_input offset"); } Temp prim_mask = get_arg(ctx, ctx->args->ac.prim_mask); - nir_const_value* offset = nir_src_as_const_value(instr->src[offset_idx]); + nir_const_value* offset = nir_src_as_const_value(*off_src); if (offset) { assert(offset->u32 == 0); } else { /* the lower 15bit of the prim_mask contain the offset into LDS * while the upper bits contain the number of prims */ - Temp offset_src = get_ssa_temp(ctx, instr->src[offset_idx].ssa); + Temp offset_src = get_ssa_temp(ctx, off_src->ssa); assert(offset_src.regClass() == s1 && "TODO: divergent offsets..."); Builder bld(ctx->program, ctx->block); Temp stride = bld.sop2(aco_opcode::s_lshr_b32, bld.def(s1), bld.def(s1, scc), prim_mask, Operand(16u)); -- 2.7.4