From 421acb509443477564f3b3e80a3a6cb91aa532f9 Mon Sep 17 00:00:00 2001 From: Steve MacLean Date: Thu, 31 May 2018 16:58:03 -0400 Subject: [PATCH] [Arm64] Implement genZeroInitFltRegs for float (#18200) --- src/jit/codegencommon.cpp | 5 +++-- tests/arm64/Tests.lst | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/src/jit/codegencommon.cpp b/src/jit/codegencommon.cpp index dde2bb8..d595143 100644 --- a/src/jit/codegencommon.cpp +++ b/src/jit/codegencommon.cpp @@ -5825,7 +5825,8 @@ void CodeGen::genZeroInitFltRegs(const regMaskTP& initFltRegs, const regMaskTP& inst_RV_RV(INS_xorps, reg, reg, TYP_DOUBLE); dblInitReg = reg; #elif defined(_TARGET_ARM64_) - NYI("Initialize floating-point register to zero"); + // We will just zero out the entire vector register. This sets it to a double/float zero value + getEmitter()->emitIns_R_I(INS_movi, EA_16BYTE, reg, 0x00, INS_OPTS_16B); #else // _TARGET_* #error Unsupported or unset target architecture #endif @@ -5859,7 +5860,7 @@ void CodeGen::genZeroInitFltRegs(const regMaskTP& initFltRegs, const regMaskTP& inst_RV_RV(INS_xorps, reg, reg, TYP_DOUBLE); fltInitReg = reg; #elif defined(_TARGET_ARM64_) - // We will just zero out the entire vector register. This sets it to a double zero value + // We will just zero out the entire vector register. This sets it to a double/float zero value getEmitter()->emitIns_R_I(INS_movi, EA_16BYTE, reg, 0x00, INS_OPTS_16B); #else // _TARGET_* #error Unsupported or unset target architecture diff --git a/tests/arm64/Tests.lst b/tests/arm64/Tests.lst index c54b3a4..1dfe0f2 100644 --- a/tests/arm64/Tests.lst +++ b/tests/arm64/Tests.lst @@ -94745,7 +94745,7 @@ RelativePath=JIT\Regression\JitBlue\DevDiv_590772\DevDiv_590772\DevDiv_590772.cm WorkingDir=JIT\Regression\JitBlue\DevDiv_590772\DevDiv_590772 Expected=0 MaxAllowedDurationSeconds=600 -Categories=EXPECTED_FAIL;17968;EXCLUDED +Categories=EXPECTED_PASS HostStyle=0 [DevDiv_605447.cmd_12217] @@ -94753,7 +94753,7 @@ RelativePath=JIT\Regression\JitBlue\DevDiv_605447\DevDiv_605447\DevDiv_605447.cm WorkingDir=JIT\Regression\JitBlue\DevDiv_605447\DevDiv_605447 Expected=0 MaxAllowedDurationSeconds=600 -Categories=EXPECTED_FAIL;17966;EXCLUDED +Categories=EXPECTED_PASS HostStyle=0 [DevDiv_590771.cmd_12218] -- 2.7.4