From 41b452a5702b4a35b4ddb12a83ca21875e366d50 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 21 Jan 2021 11:26:56 +0100 Subject: [PATCH] arm64: dts: zynqmp: Wire arasan nand controller Add missing arasan controller with clocks. Disable it by default. Every board can enable it with specifying others properties. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/05cc1ce7973ac5200aeca428c137b422c827c5e8.1611224800.git.michal.simek@xilinx.com --- arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 4 ++++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index c94c3bb..7af5761 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -116,6 +116,10 @@ clocks = <&zynqmp_clk ADMA_REF>, <&zynqmp_clk LPD_LSBUS>; }; +&nand0 { + clocks = <&zynqmp_clk NAND_REF>, <&zynqmp_clk LPD_LSBUS>; +}; + &gem0 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>, <&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>, diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 31c6943..19b349f 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -462,6 +462,18 @@ interrupts = <0 112 4>; }; + nand0: nand-controller@ff100000 { + compatible = "xlnx,zynqmp-nand-controller", "arasan,nfc-v3p10"; + status = "disabled"; + reg = <0x0 0xff100000 0x0 0x1000>; + clock-names = "controller", "bus"; + interrupt-parent = <&gic>; + interrupts = <0 14 4>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&zynqmp_firmware PD_NAND>; + }; + gem0: ethernet@ff0b0000 { compatible = "cdns,zynqmp-gem", "cdns,gem"; status = "disabled"; -- 2.7.4