From 419531c5d98948ca868c8cacf310d3c7f876db26 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Tapani=20P=C3=A4lli?= Date: Thu, 8 Sep 2022 14:28:29 +0300 Subject: [PATCH] intel/blorp: add a new flag to communicate PSS sync need MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This is required for Wa_18019816803 when blorp emit DS state. Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/blorp/blorp.h | 3 +++ src/intel/blorp/blorp_genX_exec.h | 12 ++++++++++++ 2 files changed, 15 insertions(+) diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h index 7f5f24b..21cb360 100644 --- a/src/intel/blorp/blorp.h +++ b/src/intel/blorp/blorp.h @@ -109,6 +109,9 @@ enum blorp_batch_flags { /** Use the hardware blitter to perform any operations in this batch */ BLORP_BATCH_USE_BLITTER = (1 << 4), + + /** Need a PSS Stall Sync, Wa_18019816803. */ + BLORP_BATCH_NEED_PSS_STALL_SYNC = (1 << 5), }; struct blorp_batch { diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 8f60585..04030de 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -1249,6 +1249,18 @@ blorp_emit_depth_stencil_state(struct blorp_batch *batch, return 0; GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, dw, &ds); + +#if INTEL_NEEDS_WA_18019816803 + /* Check if need PSS Stall sync. */ + if (intel_needs_workaround(batch->blorp->compiler->devinfo, 18019816803) && + batch->flags & BLORP_BATCH_NEED_PSS_STALL_SYNC) { + blorp_emit(batch, GENX(PIPE_CONTROL), pc) { + pc.PSSStallSyncEnable = true; + } + batch->flags &= ~BLORP_BATCH_NEED_PSS_STALL_SYNC; + } +#endif + #else uint32_t offset; void *state = blorp_alloc_dynamic_state(batch, -- 2.7.4