From 40db9bcaf1bbc7ca849520ff537c1b9d9c2cf0bf Mon Sep 17 00:00:00 2001 From: "hong.guo" Date: Fri, 2 Feb 2018 15:26:37 +0800 Subject: [PATCH] CPUFREQ: add cpufreq dts and config. PD#156734: cpufreq: add cpufreq dts and config[1/2]. Change-Id: I39fff8a6049d8cc0b6f9b4dbfa11d2b1be504339 Signed-off-by: hong.guo --- arch/arm64/boot/dts/amlogic/g12a_pxp.dts | 52 ++++++++++++++ arch/arm64/boot/dts/amlogic/g12a_skt.dts | 53 ++++++++++++++ arch/arm64/boot/dts/amlogic/mesong12a.dtsi | 107 ++++++++++++++++++++++++++--- arch/arm64/configs/meson64_defconfig | 2 + 4 files changed, 206 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/g12a_pxp.dts b/arch/arm64/boot/dts/amlogic/g12a_pxp.dts index 7030f99..62a8742 100644 --- a/arch/arm64/boot/dts/amlogic/g12a_pxp.dts +++ b/arch/arm64/boot/dts/amlogic/g12a_pxp.dts @@ -545,8 +545,60 @@ status = "disabled"; }; /* Audio Related end */ + + cpufreq-meson { + compatible = "amlogic, cpufreq-meson"; + pinctrl-names = "default"; + pinctrl-0 = <&pwmcpu_pins>; + status = "okay"; + }; + + vddcpu0: pwmao_d-regulator { + compatible = "pwm-regulator"; + pwms = <&pwm_AO_cd MESON_PWM_1 1210 0>; + regulator-name = "vddcpu0"; + regulator-min-microvolt = <731000>; + regulator-max-microvolt = <1011000>; + regulator-always-on; + max-duty-cycle = <1210>; + /* Voltage Duty-Cycle */ + voltage-table = <1011000 0>, + <1001000 6>, + <991000 9>, + <981000 12>, + <971000 16>, + <961000 19>, + <951000 23>, + <941000 26>, + <931000 29>, + <921000 33>, + <911000 36>, + <901000 39>, + <891000 43>, + <881000 46>, + <871000 50>, + <861000 53>, + <851000 56>, + <841000 60>, + <831000 63>, + <821000 67>, + <811000 70>, + <801000 73>, + <791000 77>, + <781000 80>, + <771000 84>, + <761000 87>, + <751000 90>, + <741000 94>, + <731000 100>; + status = "okay"; + }; }; /* end of / */ +&pwm_AO_cd { + status = "okay"; + }; + &audiobus { aml_tdma: tdma { compatible = "amlogic, g12a-snd-tdma"; diff --git a/arch/arm64/boot/dts/amlogic/g12a_skt.dts b/arch/arm64/boot/dts/amlogic/g12a_skt.dts index 298a18d..ca94ebb 100644 --- a/arch/arm64/boot/dts/amlogic/g12a_skt.dts +++ b/arch/arm64/boot/dts/amlogic/g12a_skt.dts @@ -805,8 +805,61 @@ status = "disabled"; }; /* Audio Related end */ + + cpufreq-meson { + compatible = "amlogic, cpufreq-meson"; + pinctrl-names = "default"; + pinctrl-0 = <&pwmcpu_pins>; + status = "okay"; + }; + + vddcpu0: pwmao_d-regulator { + compatible = "pwm-regulator"; + pwms = <&pwm_AO_cd MESON_PWM_1 1210 0>; + regulator-name = "vddcpu0"; + regulator-min-microvolt = <731000>; + regulator-max-microvolt = <1011000>; + regulator-always-on; + max-duty-cycle = <1210>; + /* Voltage Duty-Cycle */ + voltage-table = <1011000 0>, + <1001000 6>, + <991000 9>, + <981000 12>, + <971000 16>, + <961000 19>, + <951000 23>, + <941000 26>, + <931000 29>, + <921000 33>, + <911000 36>, + <901000 39>, + <891000 43>, + <881000 46>, + <871000 50>, + <861000 53>, + <851000 56>, + <841000 60>, + <831000 63>, + <821000 67>, + <811000 70>, + <801000 73>, + <791000 77>, + <781000 80>, + <771000 84>, + <761000 87>, + <751000 90>, + <741000 94>, + <731000 100>; + + status = "okay"; + }; }; /* end of / */ +&pwm_AO_cd { + status = "okay"; + }; + &i2c3 { status = "okay"; pinctrl-names="default"; diff --git a/arch/arm64/boot/dts/amlogic/mesong12a.dtsi b/arch/arm64/boot/dts/amlogic/mesong12a.dtsi index 7901001..4435c4c 100644 --- a/arch/arm64/boot/dts/amlogic/mesong12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesong12a.dtsi @@ -56,9 +56,16 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; - //clocks = <&scpi_dvfs 0>; - //clock-names = "cpu-cluster.0"; //cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&clkc CLKID_CPU_CLK>, + <&clkc CLKID_CPU_FCLK_P>, + <&clkc CLKID_SYS_PLL>; + clock-names = "core_clk", + "low_freq_clk_parent", + "high_freq_clk_parent"; + operating-points-v2 = <&cpu_opp_table0>; + cpu-supply = <&vddcpu0>; + voltage-tolerance = <0>; }; CPU1:cpu@1 { @@ -66,9 +73,16 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; - //clocks = <&scpi_dvfs 0>; - //clock-names = "cpu-cluster.0"; //cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&clkc CLKID_CPU_CLK>, + <&clkc CLKID_CPU_FCLK_P>, + <&clkc CLKID_SYS_PLL>; + clock-names = "core_clk", + "low_freq_clk_parent", + "high_freq_clk_parent"; + operating-points-v2 = <&cpu_opp_table0>; + cpu-supply = <&vddcpu0>; + voltage-tolerance = <0>; }; CPU2:cpu@2 { @@ -76,9 +90,16 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; - //clocks = <&scpi_dvfs 0>; - //clock-names = "cpu-cluster.0"; //cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&clkc CLKID_CPU_CLK>, + <&clkc CLKID_CPU_FCLK_P>, + <&clkc CLKID_SYS_PLL>; + clock-names = "core_clk", + "low_freq_clk_parent", + "high_freq_clk_parent"; + operating-points-v2 = <&cpu_opp_table0>; + cpu-supply = <&vddcpu0>; + voltage-tolerance = <0>; }; CPU3:cpu@3 { @@ -86,9 +107,16 @@ compatible = "arm,cortex-a53","arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; - //clocks = <&scpi_dvfs 0>; - //clock-names = "cpu-cluster.0"; //cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&clkc CLKID_CPU_CLK>, + <&clkc CLKID_CPU_FCLK_P>, + <&clkc CLKID_SYS_PLL>; + clock-names = "core_clk", + "low_freq_clk_parent", + "high_freq_clk_parent"; + operating-points-v2 = <&cpu_opp_table0>; + cpu-supply = <&vddcpu0>; + voltage-tolerance = <0>; }; idle-states { @@ -104,6 +132,63 @@ }; }; + cpu_opp_table0: cpu_opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <761000>; + clock-latency-ns = <2000000>; + }; + opp01 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <781000>; + clock-latency-ns = <2000000>; + }; + opp02 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <801000>; + clock-latency-ns = <2000000>; + }; + opp03 { + opp-hz = /bits/ 64 <667000000>; + opp-microvolt = <851000>; + clock-latency-ns = <2000000>; + }; + opp04 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <881000>; + clock-latency-ns = <2000000>; + }; + opp05 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <891000>; + clock-latency-ns = <2000000>; + }; + opp06 { + opp-hz = /bits/ 64 <1398000000>; + opp-microvolt = <981000>; + clock-latency-ns = <2000000>; + }; + opp07 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <991000>; + clock-latency-ns = <2000000>; + }; + opp08 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1001000>; + clock-latency-ns = <2000000>; + }; + + opp09 { + opp-hz = /bits/ 64 <1992000000>; + opp-microvolt = <1011000>; + clock-latency-ns = <2000000>; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = , @@ -701,6 +786,12 @@ function = "uart_ao_b"; }; }; + pwmcpu_pins:pwmcpus { + mux { + groups = "pwm_ao_d_e"; + function = "pwm_ao_d"; + }; + }; }; &pinctrl_periphs { diff --git a/arch/arm64/configs/meson64_defconfig b/arch/arm64/configs/meson64_defconfig index 41cb86a..b1c1445 100644 --- a/arch/arm64/configs/meson64_defconfig +++ b/arch/arm64/configs/meson64_defconfig @@ -57,6 +57,7 @@ CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_FREQ_GOV_INTERACTIVE=y CONFIG_ARM_BIG_LITTLE_CPUFREQ=y CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_ARM_MESON_CPUFREQ=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_PACKET_DIAG=y @@ -245,6 +246,7 @@ CONFIG_AMLOGIC_GX_REBOOT=y CONFIG_AMLOGIC_INTERNAL_PHY=y CONFIG_AMLOGIC_CPU_HOTPLUG=y CONFIG_AMLOGIC_PWM=y +CONFIG_REGULATOR_PWM=y CONFIG_AMLOGIC_MEDIA_ENABLE=y CONFIG_AMLOGIC_MEDIA_COMMON=y CONFIG_AMLOGIC_MEDIA_DRIVERS=y -- 2.7.4