From 4068e2d1b766a9ccedcb8d7cd07c49d22dff39f0 Mon Sep 17 00:00:00 2001 From: Wang Zhenyu Date: Mon, 11 Dec 2006 00:01:56 -0800 Subject: [PATCH] i965: ARB_occlusion_query support Signed-off-by: Keith Packard --- src/mesa/drivers/dri/i965/brw_wm_state.c | 2 +- src/mesa/drivers/dri/i965/intel_context.c | 34 ++++++++++++++++++++++++++ src/mesa/drivers/dri/i965/intel_context.h | 1 + src/mesa/drivers/dri/i965/server/i830_common.h | 19 ++++++++++++++ 4 files changed, 55 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index 4707a70..e41042d 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -168,7 +168,7 @@ static void upload_wm_unit(struct brw_context *brw ) wm.wm5.line_stipple = 1; } - if (INTEL_DEBUG & DEBUG_STATS) + if (INTEL_DEBUG & DEBUG_STATS || intel->stats_wm) wm.wm4.stats_enable = 1; brw->wm.state_gs_offset = brw_cache_data( &brw->cache[BRW_WM_UNIT], &wm ); diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c index 5e97e4d..9acafe5 100644 --- a/src/mesa/drivers/dri/i965/intel_context.c +++ b/src/mesa/drivers/dri/i965/intel_context.c @@ -70,6 +70,7 @@ int INTEL_DEBUG = (0); #define need_GL_ARB_vertex_buffer_object #define need_GL_ARB_vertex_program #define need_GL_ARB_window_pos +#define need_GL_ARB_occlusion_query #define need_GL_EXT_blend_color #define need_GL_EXT_blend_equation_separate #define need_GL_EXT_blend_func_separate @@ -157,6 +158,7 @@ const struct dri_extension card_extensions[] = { "GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions }, { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions }, { "GL_ARB_window_pos", GL_ARB_window_pos_functions }, + { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions}, { "GL_EXT_blend_color", GL_EXT_blend_color_functions }, { "GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions }, { "GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions }, @@ -241,6 +243,36 @@ void intelFinish( GLcontext *ctx ) bmFinishFence(intel, bmLockAndFence(intel)); } +static void +intelBeginQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q) +{ + struct intel_context *intel = intel_context( ctx ); + GLuint64EXT tmp = 0; + drmI830MMIO io = { + .read_write = MMIO_WRITE, + .reg = MMIO_REGS_PS_DEPTH_COUNT, + .data = &tmp + }; + intel->stats_wm = GL_TRUE; + intelFinish(&intel->ctx); + drmCommandWrite(intel->driFd, DRM_I830_MMIO, &io, sizeof(io)); +} + +static void +intelEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q) +{ + struct intel_context *intel = intel_context( ctx ); + drmI830MMIO io = { + .read_write = MMIO_READ, + .reg = MMIO_REGS_PS_DEPTH_COUNT, + .data = &q->Result + }; + intelFinish(&intel->ctx); + drmCommandRead(intel->driFd, DRM_I830_MMIO, &io, sizeof(io)); + q->Ready = GL_TRUE; + intel->stats_wm = GL_FALSE; +} + void intelInitDriverFunctions( struct dd_function_table *functions ) { @@ -250,6 +282,8 @@ void intelInitDriverFunctions( struct dd_function_table *functions ) functions->Finish = intelFinish; functions->GetString = intelGetString; functions->UpdateState = intelInvalidateState; + functions->BeginQuery = intelBeginQuery; + functions->EndQuery = intelEndQuery; /* CopyPixels can be accelerated even with the current memory * manager: diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h index 8367a95..fe7ee38 100644 --- a/src/mesa/drivers/dri/i965/intel_context.h +++ b/src/mesa/drivers/dri/i965/intel_context.h @@ -177,6 +177,7 @@ struct intel_context GLuint second_last_swap_fence; GLboolean aub_wrap; + GLboolean stats_wm; struct intel_batchbuffer *batch; diff --git a/src/mesa/drivers/dri/i965/server/i830_common.h b/src/mesa/drivers/dri/i965/server/i830_common.h index e3bbdc7..f320378 100644 --- a/src/mesa/drivers/dri/i965/server/i830_common.h +++ b/src/mesa/drivers/dri/i965/server/i830_common.h @@ -52,6 +52,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define DRM_I830_INIT_HEAP 0x0a #define DRM_I830_CMDBUFFER 0x0b #define DRM_I830_DESTROY_HEAP 0x0c +#define DRM_I830_MMIO 0x10 typedef struct { enum { @@ -199,5 +200,23 @@ typedef struct { int region; } drmI830MemDestroyHeap; +#define MMIO_READ 0 +#define MMIO_WRITE 1 + +#define MMIO_REGS_IA_PRIMATIVES_COUNT 0 +#define MMIO_REGS_IA_VERTICES_COUNT 1 +#define MMIO_REGS_VS_INVOCATION_COUNT 2 +#define MMIO_REGS_GS_PRIMITIVES_COUNT 3 +#define MMIO_REGS_GS_INVOCATION_COUNT 4 +#define MMIO_REGS_CL_PRIMITIVES_COUNT 5 +#define MMIO_REGS_CL_INVOCATION_COUNT 6 +#define MMIO_REGS_PS_INVOCATION_COUNT 7 +#define MMIO_REGS_PS_DEPTH_COUNT 8 + +typedef struct { + unsigned int read_write:1; + unsigned int reg:31; + void __user *data; +} drmI830MMIO; #endif /* _I830_DRM_H_ */ -- 2.7.4