From 3f1b35a2f0323875d3ca1c4e01e365a9acb8edba Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 29 Sep 2020 17:34:28 -0400 Subject: [PATCH] nir: add new helper passes that lower uniforms to literals Reviewed-by: Timothy Arceri Part-of: --- src/compiler/Makefile.sources | 1 + src/compiler/nir/meson.build | 1 + src/compiler/nir/nir.h | 5 + src/compiler/nir/nir_inline_uniforms.c | 202 +++++++++++++++++++++++++++++++++ src/compiler/shader_info.h | 5 + 5 files changed, 214 insertions(+) create mode 100644 src/compiler/nir/nir_inline_uniforms.c diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources index cd303e5..0c69218 100644 --- a/src/compiler/Makefile.sources +++ b/src/compiler/Makefile.sources @@ -227,6 +227,7 @@ NIR_FILES = \ nir/nir_gather_xfb_info.c \ nir/nir_gs_count_vertices.c \ nir/nir_inline_functions.c \ + nir/nir_inline_uniforms.c \ nir/nir_instr_set.c \ nir/nir_instr_set.h \ nir/nir_linking_helpers.c \ diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build index 56db0a1c..992047f 100644 --- a/src/compiler/nir/meson.build +++ b/src/compiler/nir/meson.build @@ -107,6 +107,7 @@ files_libnir = files( 'nir_gather_xfb_info.c', 'nir_gs_count_vertices.c', 'nir_inline_functions.c', + 'nir_inline_uniforms.c', 'nir_instr_set.c', 'nir_instr_set.h', 'nir_linking_helpers.c', diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 4630174..8ef9593 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -4124,6 +4124,11 @@ void nir_inline_function_impl(struct nir_builder *b, struct hash_table *shader_var_remap); bool nir_inline_functions(nir_shader *shader); +void nir_find_inlinable_uniforms(nir_shader *shader); +void nir_inline_uniforms(nir_shader *shader, unsigned num_uniforms, + const uint32_t *uniform_values, + const uint16_t *uniform_dw_offsets); + bool nir_propagate_invariant(nir_shader *shader); void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader); diff --git a/src/compiler/nir/nir_inline_uniforms.c b/src/compiler/nir/nir_inline_uniforms.c new file mode 100644 index 0000000..8fdcd2d --- /dev/null +++ b/src/compiler/nir/nir_inline_uniforms.c @@ -0,0 +1,202 @@ +/* + * Copyright © 2020 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* These passes enable converting uniforms to literals when it's profitable, + * effectively inlining uniform values in the IR. The main benefit is register + * usage decrease leading to better SMT (hyperthreading). It's accomplished + * by targetting uniforms that determine whether a conditional branch is + * taken. + * + * Only uniforms used in if conditions are analyzed. + * + * nir_find_inlinable_uniforms finds uniforms that can be inlined and stores + * that information in shader_info. + * + * nir_inline_uniforms inlines uniform values. + * + * (uniforms must be lowered to load_ubo before calling this) + */ + +#include "compiler/nir/nir_builder.h" + +/* Maximum value in shader_info::inlinable_uniform_dw_offsets[] */ +#define MAX_OFFSET (UINT16_MAX * 4) + +static bool +src_only_uses_uniforms(const nir_src *src, struct set **uni_offsets) +{ + if (!src->is_ssa) + return false; + + nir_instr *instr = src->ssa->parent_instr; + + switch (instr->type) { + case nir_instr_type_alu: { + /* Return true if all sources return true. */ + /* TODO: Swizzles are ignored, so vectors can prevent inlining. */ + nir_alu_instr *alu = nir_instr_as_alu(instr); + for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { + if (!src_only_uses_uniforms(&alu->src[i].src, uni_offsets)) + return false; + } + return true; + } + + case nir_instr_type_intrinsic: { + nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); + /* Return true if the intrinsic loads from UBO 0 with a constant + * offset. + */ + if (intr->intrinsic == nir_intrinsic_load_ubo && + nir_src_is_const(intr->src[0]) && + nir_src_as_uint(intr->src[0]) == 0 && + nir_src_is_const(intr->src[1]) && + nir_src_as_uint(intr->src[1]) <= MAX_OFFSET && + /* TODO: Can't handle vectors and other bit sizes for now. */ + /* UBO loads should be scalarized. */ + intr->dest.ssa.num_components == 1 && + intr->dest.ssa.bit_size == 32) { + /* Record the uniform offset. */ + if (!*uni_offsets) + *uni_offsets = _mesa_set_create_u32_keys(NULL); + + /* Add 1 because the set doesn't allow NULL keys. */ + _mesa_set_add(*uni_offsets, + (void*)(uintptr_t)(nir_src_as_uint(intr->src[1]) + 1)); + return true; + } + return false; + } + + case nir_instr_type_load_const: + /* Always return true for constants. */ + return true; + + default: + return false; + } +} + +void +nir_find_inlinable_uniforms(nir_shader *shader) +{ + struct set *uni_offsets = NULL; + + nir_foreach_function(function, shader) { + if (function->impl) { + foreach_list_typed(nir_cf_node, node, node, &function->impl->body) { + switch (node->type) { + case nir_cf_node_if: { + const nir_src *cond = &nir_cf_node_as_if(node)->condition; + struct set *found_offsets = NULL; + + if (src_only_uses_uniforms(cond, &found_offsets) && + found_offsets) { + /* All uniforms are lowerable. Save uniform offsets. */ + set_foreach(found_offsets, entry) { + if (!uni_offsets) + uni_offsets = _mesa_set_create_u32_keys(NULL); + + _mesa_set_add(uni_offsets, entry->key); + } + } + if (found_offsets) + _mesa_set_destroy(found_offsets, NULL); + break; + } + + case nir_cf_node_loop: + /* TODO: handle loops if we want to unroll them at draw time */ + break; + + default: + break; + } + } + } + } + + if (uni_offsets) { + unsigned num = 0; + + set_foreach(uni_offsets, entry) { + /* Subtract 1 because all keys are + 1. */ + uint32_t offset = (uintptr_t)entry->key - 1; + assert(offset < MAX_OFFSET); + + if (num < MAX_INLINABLE_UNIFORMS) + shader->info.inlinable_uniform_dw_offsets[num++] = offset / 4; + } + shader->info.num_inlinable_uniforms = num; + _mesa_set_destroy(uni_offsets, NULL); + } +} + +void +nir_inline_uniforms(nir_shader *shader, unsigned num_uniforms, + const uint32_t *uniform_values, + const uint16_t *uniform_dw_offsets) +{ + if (!num_uniforms) + return; + + nir_foreach_function(function, shader) { + if (function->impl) { + nir_builder b; + nir_builder_init(&b, function->impl); + nir_foreach_block(block, function->impl) { + nir_foreach_instr_safe(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); + + /* Only replace UBO 0 with constant offsets. */ + if (intr->intrinsic == nir_intrinsic_load_ubo && + nir_src_is_const(intr->src[0]) && + nir_src_as_uint(intr->src[0]) == 0 && + nir_src_is_const(intr->src[1]) && + /* TODO: Can't handle vectors and other bit sizes for now. */ + /* UBO loads should be scalarized. */ + intr->dest.ssa.num_components == 1 && + intr->dest.ssa.bit_size == 32) { + uint64_t offset = nir_src_as_uint(intr->src[1]); + + for (unsigned i = 0; i < num_uniforms; i++) { + if (offset == uniform_dw_offsets[i] * 4) { + b.cursor = nir_before_instr(&intr->instr); + nir_ssa_def *def = nir_imm_int(&b, uniform_values[i]); + nir_ssa_def_rewrite_uses(&intr->dest.ssa, nir_src_for_ssa(def)); + nir_instr_remove(&intr->instr); + break; + } + } + } + } + } + + nir_metadata_preserve(function->impl, nir_metadata_block_index | + nir_metadata_dominance); + } + } +} diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h index bee2847..3bb6779 100644 --- a/src/compiler/shader_info.h +++ b/src/compiler/shader_info.h @@ -32,6 +32,8 @@ extern "C" { #endif +#define MAX_INLINABLE_UNIFORMS 4 + struct spirv_supported_capabilities { bool address; bool atomic_storage; @@ -165,6 +167,9 @@ typedef struct shader_info { /* SPV_KHR_float_controls: execution mode for floating point ops */ uint16_t float_controls_execution_mode; + uint16_t inlinable_uniform_dw_offsets[MAX_INLINABLE_UNIFORMS]; + uint8_t num_inlinable_uniforms:4; + /* The size of the gl_ClipDistance[] array, if declared. */ uint8_t clip_distance_array_size:4; -- 2.7.4