From 3e7be5b85517946b2d9024b4ea18540f7d6e8ff8 Mon Sep 17 00:00:00 2001 From: hjl Date: Thu, 20 Oct 2011 20:37:32 +0000 Subject: [PATCH] Fix operands order in BMI2 patterns. gcc/ 2011-10-20 Kirill Yukhin PR target/50766 * config/i386/i386.md (bmi_bextr_): Update register/ memory operand order. (bmi2_bzhi_3): Ditto. (bmi2_pdep_3): Ditto. (bmi2_pext_3): Ditto. gcc/testsuite/ 2011-10-20 Kirill Yukhin PR target/50766 * gcc.target/i386/pr50766.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180271 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 9 +++++++++ gcc/config/i386/i386.md | 16 ++++++++-------- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr50766.c | 17 +++++++++++++++++ 4 files changed, 39 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr50766.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f48e2ad..30a25f9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2011-10-20 Kirill Yukhin + + PR target/50766 + * config/i386/i386.md (bmi_bextr_): Update register/ + memory operand order. + (bmi2_bzhi_3): Ditto. + (bmi2_pdep_3): Ditto. + (bmi2_pext_3): Ditto. + 2011-10-20 Richard Henderson * target.def (vec_perm_const_ok): Rename from builtin_vec_perm_ok. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 9c9508d..866fb05 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12099,8 +12099,8 @@ (define_insn "bmi_bextr_" [(set (match_operand:SWI48 0 "register_operand" "=r") - (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm") - (match_operand:SWI48 2 "register_operand" "r")] + (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r") + (match_operand:SWI48 2 "nonimmediate_operand" "rm")] UNSPEC_BEXTR)) (clobber (reg:CC FLAGS_REG))] "TARGET_BMI" @@ -12149,9 +12149,9 @@ ;; BMI2 instructions. (define_insn "bmi2_bzhi_3" [(set (match_operand:SWI48 0 "register_operand" "=r") - (and:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm") + (and:SWI48 (match_operand:SWI48 1 "register_operand" "r") (lshiftrt:SWI48 (const_int -1) - (match_operand:SWI48 2 "register_operand" "r")))) + (match_operand:SWI48 2 "nonimmediate_operand" "rm")))) (clobber (reg:CC FLAGS_REG))] "TARGET_BMI2" "bzhi\t{%2, %1, %0|%0, %1, %2}" @@ -12161,8 +12161,8 @@ (define_insn "bmi2_pdep_3" [(set (match_operand:SWI48 0 "register_operand" "=r") - (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm") - (match_operand:SWI48 2 "register_operand" "r")] + (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r") + (match_operand:SWI48 2 "nonimmediate_operand" "rm")] UNSPEC_PDEP))] "TARGET_BMI2" "pdep\t{%2, %1, %0|%0, %1, %2}" @@ -12172,8 +12172,8 @@ (define_insn "bmi2_pext_3" [(set (match_operand:SWI48 0 "register_operand" "=r") - (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm") - (match_operand:SWI48 2 "register_operand" "r")] + (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r") + (match_operand:SWI48 2 "nonimmediate_operand" "rm")] UNSPEC_PEXT))] "TARGET_BMI2" "pext\t{%2, %1, %0|%0, %1, %2}" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 00e95e0..f373799 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2011-10-20 Kirill Yukhin + + PR target/50766 + * gcc.target/i386/pr50766.c: New test. + 2011-10-20 Jason Merrill PR c++/41449 diff --git a/gcc/testsuite/gcc.target/i386/pr50766.c b/gcc/testsuite/gcc.target/i386/pr50766.c new file mode 100644 index 0000000..9923de4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr50766.c @@ -0,0 +1,17 @@ +/* PR target/50766 */ +/* { dg-do assemble } */ +/* { dg-options "-mbmi2" } */ +/* { dg-require-effective-target bmi2 } */ + +#include + +unsigned z; + +void +foo () +{ + unsigned x = 0x23593464; + unsigned y = 0xF9494302; + z = _pext_u32(x, y); +} + -- 2.7.4